diff -ubrN ../../flashrom.original/board_enable.c flashrom.new/board_enable.c --- ../../flashrom.original/board_enable.c 2007-10-15 01:14:29.000000000 +0200 +++ flashrom.new/board_enable.c 2007-10-14 20:28:41.000000000 +0200 @@ -37,7 +37,7 @@ #define JEDEC_RDID_OUTSIZE 0x01 #define JEDEC_RDID_INSIZE 0x03
-static uint16_t it8716f_flashport = 0; +uint16_t it8716f_flashport = 0;
/* Generic Super I/O helper functions */ uint8_t regval(uint16_t port, uint8_t reg) @@ -111,7 +111,7 @@ whereas the IT8716F splits commands internally into address and non-address commands with the address in inverse wire order. That's why the register ordering in case 4 and 5 may seem strange. */ -static int it8716f_spi_command(uint16_t port, unsigned char writecnt, unsigned char readcnt, const unsigned char *writearr, unsigned char *readarr) +int it8716f_spi_command(uint16_t port, unsigned char writecnt, unsigned char readcnt, const unsigned char *writearr, unsigned char *readarr) { uint8_t busy, writeenc; do { diff -ubrN ../../flashrom.original/board_enable.h flashrom.new/board_enable.h --- ../../flashrom.original/board_enable.h 1970-01-01 01:00:00.000000000 +0100 +++ flashrom.new/board_enable.h 2007-10-14 21:09:18.000000000 +0200 @@ -0,0 +1,7 @@ +#ifndef boardenableh +#define boardenableh +uint16_t it8716f_flashport; +uint8_t regval(uint16_t port, uint8_t reg); +void regwrite(uint16_t port, uint8_t reg, uint8_t val); +int it8716f_spi_command(uint16_t port, unsigned char writecnt, unsigned char readcnt, const unsigned char *writearr, unsigned char *readarr); +#endif diff -ubrN ../../flashrom.original/flashchips.c flashrom.new/flashchips.c --- ../../flashrom.original/flashchips.c 2007-10-15 01:14:28.000000000 +0200 +++ flashrom.new/flashchips.c 2007-10-15 01:24:58.000000000 +0200 @@ -39,7 +39,7 @@ {"Mx29f002", MX_ID, MX_29F002, 256, 64 * 1024, probe_29f002, erase_29f002, write_29f002}, {"MX25L4005", MX_ID, MX_25L4005, 512, 4 * 1024,
probe_spi, NULL, NULL},
{"SST29EE020A", SST_ID, SST_29EE020A, 256, 128, probe_jedec, erase_chip_jedec, write_jedec}, {"SST28SF040A", SST_ID, SST_28SF040, 512, 256,probe_spi, erase_25l4005, write_25l4005},
diff -ubrN ../../flashrom.original/flash.h flashrom.new/flash.h --- ../../flashrom.original/flash.h 2007-10-15 01:14:28.000000000 +0200 +++ flashrom.new/flash.h 2007-10-14 19:13:52.000000000 +0200 @@ -294,4 +294,10 @@ /* w49f002u.c */ int write_49f002(struct flashchip *flash, uint8_t *buf);
+/* mx25l4005.c */ +// probe +int write_25l4005(struct flashchip *flash, uint8_t *buf); +int erase_25l4005(struct flashchip *flash); +int read_25l4005(struct flashchip *flash, uint8_t *buf);
#endif /* !__FLASH_H__ */ diff -ubrN ../../flashrom.original/Makefile flashrom.new/Makefile --- ../../flashrom.original/Makefile 2007-10-15 01:14:29.000000000 +0200 +++ flashrom.new/Makefile 2007-10-15 01:20:16.000000000 +0200 @@ -24,7 +24,7 @@ am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o w49f002u.o \ 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o sst49lfxxxc.o \ sst_fwhub.o layout.o lbtable.o flashchips.o flashrom.o \
- sharplhf00l04.o w29ee011.o
- sharplhf00l04.o w29ee011.o mx25l4005.o
all: pciutils dep $(PROGRAM)
@@ -33,7 +33,7 @@ $(STRIP) $(STRIP_ARGS) $(PROGRAM)
clean:
- rm -f *.o *~
- rm -f *.o *~ flashrom
distclean: clean rm -f $(PROGRAM) .dependencies diff -ubrN ../../flashrom.original/mx25l4005.c flashrom.new/mx25l4005.c --- ../../flashrom.original/mx25l4005.c 1970-01-01 01:00:00.000000000 +0100 +++ flashrom.new/mx25l4005.c 2007-10-15 01:17:56.000000000 +0200 @@ -0,0 +1,57 @@ +#include <stdint.h> +#include <stdlib.h> +#include <stdio.h> +#include "flash.h" +#include "board_enable.h"
+static void check_n_write_enable() {
- uint8_t result[3] = {0, 0, 0};
- uint8_t command[5] = {0x06, 0, 0, 0, 0};
- // Send WREN (Write Enable)
- it8716f_spi_command(it8716f_flashport, 1, 0, command, result);
- uint8_t reg=regval(it8716f_flashport,0x24);
- reg|=(1<<4);
- regwrite(it8716f_flashport,0x24,reg);
+}
+static void write_disable() {
- uint8_t result[3] = {0, 0, 0};
- uint8_t command[5] = {0x04, 0, 0, 0, 0};
- // Send WRDI (Write Disable)
- it8716f_spi_command(it8716f_flashport, 1, 0, command, result);
- uint8_t reg=regval(it8716f_flashport,0x24);
- reg&=~(1<<4);
- regwrite(it8716f_flashport,0x24,reg);
+}
+void write256b(int block, uint8_t *buf, uint8_t *bios ) {
- check_n_write_enable();
- outb(0x06,it8716f_flashport+1);
- outb((3<<4),it8716f_flashport);
- int i;
- for (i=0;i<256;++i) {
bios[256*block+i]=buf[256*block+i];
- }
- outb(0,it8716f_flashport);
- write_disable();
- usleep (100000);
-usleep (100000); +usleep (1000); //also works fine with a value of 1000, and is much faster with that.
+}
+int write_25l4005(struct flashchip *flash, uint8_t *buf) {
- int total_size=1024*flash->total_size;
- int i;
- for (i=0;i<total_size/256;++i) {
write256b(i, buf, (uint8_t*)flash->virtual_memory);
- }
+return 0; +}
+int erase_25l4005(struct flashchip *flash) { +check_n_write_enable(); +uint8_t result[3]={0, 0, 0}; +uint8_t command[5]={0xc7, 0, 0, 0, 0}; +it8716f_spi_command(it8716f_flashport, 1, 0, command, result); +write_disable();
+sleep (3); // the chip needs some time, until it responses again.
+return 0; +}