David Hendricks (dhendrix@chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2350
-gerrit
commit 593b61ec770316d569077ef08a7b22597c0d57c3 Author: David Hendricks dhendrix@chromium.org Date: Sun Feb 10 15:59:22 2013 -0800
snow: switch to stack in DRAM once in ramstage
This patch gives us some stack space in RAM and sets our stack pointer to once we begin ramstage.
Note: We may not need this patch after all since we should have plenty of stack space in SRAM. It might be simpler (and perhaps faster) to keep the stack in SRAM.
(credit to Gabe for this one, I'm just putting it up on gerrit)
Change-Id: I2e447d6359d52e4615e1cd7811e6f167e3dc314b Signed-off-by: David Hendricks dhendrix@chromium.org Signed-off-by: Gabe Black gabeblack@chromium.org --- src/arch/armv7/Kconfig | 4 ++++ src/mainboard/google/snow/ramstage.c | 37 ++++++++++++------------------------ 2 files changed, 16 insertions(+), 25 deletions(-)
diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index 488ca97..fe36d79 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -49,4 +49,8 @@ config ARM_DCACHE_POLICY_WRITETHROUGH bool default n
+config STACK_SIZE + hex + default 0x1000 + endmenu diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c index e144388..a15336d 100644 --- a/src/mainboard/google/snow/ramstage.c +++ b/src/mainboard/google/snow/ramstage.c @@ -17,6 +17,7 @@ * MA 02111-1307 USA */
+#include <lib.h> #include <console/console.h> #include <device/device.h>
@@ -25,7 +26,7 @@ #endif
void hardwaremain(int boot_complete); -void main(void) +static void real_main(void) { console_init(); printk(BIOS_INFO, "hello from ramstage\n"); @@ -41,30 +42,6 @@ void main(void) hardwaremain(0); }
-#if 0 -static void mainboard_read_resources(device_t dev) -{ - printk(BIOS_DEBUG, "%s: entered\n", __func__); - /* Report the memory regions */ - ram_resource(dev, 0, - CONFIG_SYS_SDRAM_BASE + (CONFIG_COREBOOT_ROMSIZE_KB), - ((CONFIG_DRAM_SIZE_MB << 10UL) * CONFIG_NR_DRAM_BANKS) - - CONFIG_COREBOOT_TABLES_SIZE); -} - -static void mainboard_set_resources(device_t dev) -{ - printk(BIOS_DEBUG, "%s: entered\n", __func__); - - assign_resources(dev->link_list); -} - -static struct device_operations mainboard_device_ops = { - .read_resources = mainboard_read_resources, - .set_resources = mainboard_set_resources, -}; -#endif - static void mainboard_enable(device_t dev) { printk(BIOS_DEBUG, "%s: entered\n", __func__); @@ -75,3 +52,13 @@ struct chip_operations mainboard_ops = { .name = "Samsung/Google ARM ChromeBook", .enable_dev = mainboard_enable, }; + +void main(void) +{ + __asm__ __volatile__( + "mov sp, %0\n\r" + "mov pc, %1\n\r" + : + :"r"(_estack), "r"(&real_main) + ); +}