ron minnich rminnich@lanl.gov writes:
Worked fine.
The alpha port worked but it is not something I savor repeating, there were too many real limitations.
There are some things that I find strongly architecturally questionable about Tiano, in the context of Intel hardware. Unfortunately neither Tiano or the Intel hardware I am thinking about has been released...
Consider what it takes to maintain a cache-as-ram implementation.
Eric