Re: [coreboot] AGESA PI for Olivehill+

[Marc Jones]

As Wim pointed out, it is possible, but not exactly clear as there was a
big effort to clean up the buildopts and agesa wrappers. We have a slightly
different implementation at Sage, but we are working up something that will
work with the coreboot.org code. Here is what you need to know.

The gizmosphere/gizmo2 is an example of how a board with soldered down
memory has the spd added to the rom image, but there are some differences
with the AGESA binary PI implementation.

* Add a .spd.hex file to the mainboard folder.. Everything useful pretty
much is defined in the first 30 bytes. Leave the CRC checksum bytes at
locations 126/127 as zeroes so that the CRC will get calculated runtime.
* Update the mainboard Makefile.inc to include the .spd.hex
* Update the mainboard Kconfig to select SPD_CACHE
* Update the mainboard BiosCallOuts.c file for the function to retrieve the
SPD data from {AGESA_READ_SPD, agesa_ReadSpd } to {AGESA_READ_SPD,
agesa_ReadSpd_from_cbfs }
* Update  devicetree.cb file for turn off the SMBUS, dev 14.0. Remove the
lines for the chip drivers and remove the [register "spdAddrLookup" =
"...], since the SPD data is coming from CBFS.
* Add PSO_ENTRY ROMDATA PlatformMemoryConfiguration[]  with all settings
into a a file under the mainboard and then add  it to
agesawrapper_amdinitpost() :
PostParams->MemConfig.PlatformMemoryConfiguration =
PlatformMemoryConfiguration;.

Since agesawrapper.c was moved to the chipset directory we need to check
for the table in the mainboard, but don't currently have a mechanism.  We
have some thoughts on how to do it, but it isn't prepared yet.

Regards,
Marc

On Wed, May 13, 2015 at 3:28 AM Kyösti Mälkki 
wrote:
> On ke, 2015-05-13 at 10:18 +0200, Wim Vervoorn wrote:
> > Hello Kyosti,
> >
> > I do agree with you that it is much easier and straight forward to
>
> change memory parameters when you are using the source agesa but it is
> definitely possible to do this for the binary agesa as well. You can
> provide the binary AGESA with external tables during run-time.
> >
>
> Thanks Wim!
>
> I can see how the relevant table that used to be in buildOPts.c is now
> implemented for DB-FT3b-LC board in agesawrapper.c.
>
> So Wolfgang, you can pay for the development, which IMHO should not be
> more than 2 hours of engineering time, given the infrastructure is
> already there in binaryPI. Or request a free copy of the GPL'd
> DB-FT3b-LC coreboot OSP package from Sage (se-eng.com) to see for
> yourself where the table has to seat.
>
> Or you can wait until DB-FT3b-LC board support appears upstreamed at
> coreboot.org. I have this board here on my desk so it might not take
> that long.
>
> Regards,
> Kyösti