]-----Original Message----- ]From: Bao, Zheng ]Sent: Tuesday, October 12, 2010 11:27 PM ]To: Coreboot ]Subject: [coreboot] [PATCH] 780 mmconfig space access issue ] ]I checked the code and found a stupid bug. ]I wonder if it can fix your problem. ] ]Signed-off-by: Zheng Bao zheng.bao@amd.com
acked by: Scott Duplichan scott@notabs.org
Thanks Zheng, good find.
Switching to MMIO for pci config access eliminated the ramdom AP boot hangs that I was experiencing. I mostly have win7 working smoothly on the RS780/SB700 board. The exception is the ATI video driver. If I force win7 to use the generic vga driver, it is stable. But the ATI driver is not. I enabled the debug bar to make coreboot match the production BIOS. Today I found something signigicant. Coreboot leaves RS780 bar3 enabled for the reason explained on line 346 of rs780.c (loss of video). I tried disabling bar3 anyway, to match the production BIOS. Yes, there is a momentary loss of video. But as soon as win7 starts booting, video returns. In addition, the ATI video driver no longer crashes. Now there is a remaining problem. My monitor cannot sync to the video signal. The problem may be that win7 is using too high of a refresh rate. This could be possible because the monitor detection does not seem to be working. In safe mode, device manager looks good except there is monitor detected. I think I am getting close now...
Thanks, Scott
]Index: src/southbridge/amd/rs780/rs780_cmn.c ]=================================================================== ]--- src/southbridge/amd/rs780/rs780_cmn.c (revision 5926) ]+++ src/southbridge/amd/rs780/rs780_cmn.c (working copy) ]@@ -70,7 +70,7 @@ ] reg &= ~mask; ] reg |= val; ] if (reg != reg_old) { ]- *((u32 *) addr) = val; ]+ *((u32 *) addr) = reg; ] } ] } ] ]Index: src/southbridge/amd/rs690/rs690_cmn.c ]=================================================================== ]--- src/southbridge/amd/rs690/rs690_cmn.c (revision 5926) ]+++ src/southbridge/amd/rs690/rs690_cmn.c (working copy) ]@@ -72,7 +72,7 @@ ] reg &= ~mask; ] reg |= val; ] if (reg != reg_old) { ]- *((u32 *) addr) = val; ]+ *((u32 *) addr) = reg; ] } ] } ] ]Zheng