Am 30.07.2010 19:35, schrieb austinro@msu.edu:
I have a Jetway 7F4K1G5S-LF board I'm trying to get working.
Just to make things clear - that's a Via C7 board, yes?
Any ideas?
We moved the C7 boards over to CAR (cache as RAM), but couldn't test all of them (due to availability etc). Disabling cache before RAM is available (and all data structures, esp. the stack are moved to RAM) makes the system hang.
From looking at the board's romstage.c, it seems that early_mtrr_init is
ran before RAM init, but after CAR enable.
Do you get further after disabling early_mtrr_init (which disables caching to activate the new MTRR config) completely?
Regards, Patrick