Eric,
You overwrite some lines in amd8131....
/* We have to enable MEM and Bus Master for IOAPIC */ value = pci_read_config32(dev, 0x4); value |= 6; pci_write_config32(dev, 0x4, value);
Regards
YH
static void ioapic_enable(device_t dev) { uint32_t value;
value = pci_read_config32(dev, 0x44); if (dev->enabled) { value |= ((1 << 1) | (1 << 0)); } else { value &= ~((1 << 1) | (1 << 0)); } pci_write_config32(dev, 0x44, value);
/* We have to enable MEM and Bus Master for IOAPIC */ value = pci_read_config32(dev, 0x4); value |= 6; pci_write_config32(dev, 0x4, value); }
-----Original Message----- From: ebiederman@lnxi.com [mailto:ebiederman@lnxi.com] Sent: Thursday, October 21, 2004 4:08 AM To: LinuxBIOS Subject: Freebios2 recovery progress...
I have managed to get another chunk of merging and bug fixing done tonight.
I now have pci subsystem vendor and subsystem id's being set on the arima hdama, so the board is now identifiable with lspci.
I have bumped the LinuxBIOS minor version so we can track these changes.
All of the superio chips should not work or at least be very close except the weird via superio/pci hybrid that I could not make sense of.
I have changed all of the references to chip_control to chip_operations. And fixed up the usage while I was in the neighborhood if I could clearly see what the fix should be. So Config.lb for most of the Opteron ports should work, or at least be very close now.
It is time for me to break off and head home.
Eric
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