ron minnich wrote:
On 5/29/07, Ben Hewson ben@hewson-venieri.com wrote:
there are the following 2 lines (115-116) // Set ACPI base address to IO 0x4000 pci_write_config16(dev, 0x88, 0x0401);
so is it setting it to 401? or ...
what's the chip do? This might actually be setting it to 4000 ...
ron
well it is strange. the code further on accesses the power management registers from 0x400. both the vt8231 & vt8235 set the bottom bit, don't ask me why, or if it is consistant with other chipsets.
from the 8235 datasheet
Offset 8B-88 – Power Management I/O Base .................RW 31-16 Reserved ........................................ always reads 0 15-7 Power Management I/O Register Base Address Port Address for the base of the 128-byte Power Management I/O Register block, corresponding to AD[15:7]. See “Power Management I/O Space Registers” in this document for definitions of the registers in the Power Management I/O Register Block 6-0 0000001b
if it wasn't for the code further down that uses outw() from 0x400 onwards I wouldn't have commented on it.
anyway I will declare an extern for the base io as that is how it is done in at least one of the AMD based examples.