Core 2 Duo can do cache for ram and code... But it works well enough to just set an mtrr to make rom cacheable during car and that also works for older intel CPUs
On 05.09.2008, at 11:44, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net
wrote:
On 05.09.2008 09:46, ron minnich wrote:
On Fri, Sep 5, 2008 at 12:45 AM, Jackie Pan jackiepan93@gmail.com wrote:
I'm wondering if it's possible to place code into cache-emulated RAM, I tested on an intel T2300, after CAR setup, I can read/write to the mapped region, however code execution seems not working. Postcode reveals that the CPU seems to be spinning on the very first instruction in the 'RAM' region. Anyone could give some hints? thanks.
It is possible and it works. What you might do is dump the contents of the CAR once you have copied to it and see what is there.
Yes and no. At least the new AMD Family 10h processors can't use CAR for data storage and code storage at the same time. In theory, you could fill the CAR area in data storage mode, then switch over to code storage. Not tested, though, and NOT mentioned as viable in the BKDG (BIOS and Kernel Developer's Guide).
Intel CPUs might have similar restrictions.
Regards, Carl-Daniel
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