the following patch was just integrated into master: commit 8a57e1fab956b159a549e96274d550abce724d52 Author: Stefan Reinauer reinauer@chromium.org Date: Mon Apr 2 13:24:04 2012 -0700
Add support to run SMM handler in TSEG instead of ASEG
Traditionally coreboot's SMM handler runs in ASEG (0xa0000), "behind" the graphics memory. This approach has two issues: - It limits the possible size of the SMM handler (and the number of CPUs supported in a system) - It's not considered a supported path anymore in newer CPUs.
Change-Id: I9f2877e46873ab2ea8f1157ead4bc644a50be19e Signed-off-by: Duncan Laurie dlaurie@google.com Acked-by: Stefan Reinauer reinauer@google.com
Build-Tested: build bot (Jenkins) at Wed Apr 4 04:46:51 2012, giving +1 Reviewed-By: Peter Stuge peter@stuge.se at Wed Apr 4 01:40:07 2012, giving +2 See http://review.coreboot.org/842 for details.
-gerrit