Richard Smith schrieb:
Question is, how can I set the L1 cache in early state, means set the necassary registers.
I'm a bit bandwith restricted at the moment so I can't offer a whole lot of help..
:D
There should be some examples of setting CPU registers in the CPU init code.
Problem is, I couldn't find the indexes of this registers in the datasheet.
Or how can I solve the not called init section for the gx1.
Which init function is not being called and what C file is it in?
under src/cpu/amd/model_gx1 are three files: cpu_setup.inc; gx_setup.inc and model_gx1_init.c
First I have thought, that all stuff is done by the C file, but later I have recognized that the other two files initialize the cpu in early state, short after or before the RAM init is done.
The C file does exactly the same, but there are the init functions, which are not called.
If I understand these mess right, normally this function is called by device operations. i.e initializing. But these happens on enabled devices, only. cpu_dev_ops seems to be a special case.
However, the function model_gx1_init() is never called for some reason. Therefor, x86_enable_cache is not called, too.
The northbridge.c file under src/northbridge/amd/gx1 has a similiar init function, it calls the initialize_cpus() function which later calls the cpu_initialize function. But this never happens, too.
The captured serial logs have not any debug lines about cpu initializing.
chris
-- Richard A. Smith