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On 10/27/2015 12:59 PM, ron minnich wrote:
On Tue, Oct 27, 2015 at 10:52 AM Nicky Sielicki <sielicki@nicky.io mailto:sielicki@nicky.io> wrote:
Hello list, I'm interested in cleaning up some of the VGA programming in coreboot.
Good :-)
I was trying to figure out why GM45 "native" textmode isn't working. I noticed the following bit of code > northbridge/intel/gm45/gma.c:144 > > const u8 cr[] = { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, > 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, > 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, > 0xff > }; > vga_cr_write(0x11, 0); > for (i = 0; i <= 0x18; i++) > vga_cr_write(i, cr[i]); > > <...> > vga_textmode_init();
Next question: why isn't that 0x18 a sizeof(cr)? You might fix that too :-)
That for-loop generates the following statement: > 'vga_cr_write(0x11, 0x8e)' Looking at some VGA documentation, and noticing that 0x8e has a MSB of 1, I realized that this statement just locked CRTC registers 00h-07h! (http://www.osdever.net/FreeVGA/vga/crtcreg.htm#11)
Here is something I don't know. Once locked, can they be unlocked, or is it a one way trip?
They can be unlocked again by simply clearing the lock bit. The CRTC registers are mainly locked to prevent badly behaved (old DOS mode) programs from accidentally altering the video timing configuration.
I'm also glad to hear you are working on the GM45 text mode; this is something I've been wanting to see for many months.
Thanks!
- -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) http://www.raptorengineeringinc.com