Luc Verhaegen wrote:
the following patch was just integrated into master:
Add the memory reference code binary for sandybridge chipsetsReviewed-By: Peter Stuge peter@stuge.se at Mon Apr 16 01:12:57 2012, giving +2
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For the first time in history, coreboot now supports the very latest hardware platforms from both AMD and Intel!
I think this is an incredibly exciting development, and adding the MRC is an absolute no-brainer.
Calling vendor reference code hooks for parts of the initialization is not ideal, but it is a lot better than not supporting a platform at all. For industry (which we want to reach) it may actually *be* ideal, since they are already familiar with the way the reference code works, so understanding coreboot becomes just a little bit easier.
I still believe that we the coreboot community can create more innovative init code, as we have done for a decade already, but someone has to do it. So far I don't know of significant effort to create Sandy Bridge/Ivy Bridge memory controller init, but if one is underway then once it is done I would suggest using that by default, and relegating the MRC to an expert Kconfig option.
I think Ron's effort on native Intel graphics init by refactoring KMS drivers is a great idea to have more native init, and it could well be *the* way we will finallyx get rid of the sucky VGA BIOS!
I'm very thankful for the efforts David, Stefan, Ron, and the rest of their team at Google have put into making coreboot a serious alternative for the latest Intel hardware in the industry!
You rock guys!
//Peter