[coreboot] 5536 GPIO

[Peter Stuge]

Hi,

Ward and I looked into DIVIL_LBAR_GPIO a little just now.

http://pastebin.ca/1315990

(this is msrtool trunk + http://stuge.se/mt.cs5536_pic_divil.patch)

The LED driver using the ioport has a hardcoded base address of
0x6100 because that is documented by the vendor. Changing the driver
to use 0x1c00 under coreboot works.

But looking at the 5536 data book we do not really see how these
register values will work.

Page 104 describes the operation. IO_BASE=6 BASE_ADDR=0xf0 but:
Rule. When a mask bit is cleared, the associated bit in the base
address must also be cleared.

That rule can not hold true for the values read after tinybios setup.

Also the data book does not really explain how the base ioport is
0x6100.

Please help? Want to send patch to kernel to read correct ioport from
MSR.

//Peter