Dear coreboot readers!
This is the automated build check service of coreboot.
The developer "ward" checked in revision 3088 to the coreboot source repository and caused the following changes:
Change Log: This patch fixes the decoding of the IO address range 0x0820->0x0827 into the LPC device of the MCP55 southbridge, thus enabling flashrom access to the SPI interface of the IT8716 SIO chip. Changes : 1) - increase MAX_RESOURCES to 24 in device.h -> this was needed because some functions of a PNP device can have more than 12 resources (ex the GPIO function of IT8716f), in which case one could have an "array overflow" inside the device structure (yes gcc is stupid!..) and ultimately a disaster (fool pointer at device init time..) 2) - define resource masks for the GPIO function in src/superio/ite/it8716f/superio.c -> this is needed because otherwise the IO ranges which are set into the LPC bridge of the SB are very strange (f.ex.: 0x800->0x7ff and so on..). Problem: the PNP_IO0 resource is not defined for the GPIO function, thus we have to define a "fake" mask "{0,0}" to avoid mismatching by the init code 3) - enable the flash SPI interface into src/mainboard/gigabyte/m57sli/Config.lb (by enabling the corresponding resource into the GPIO function). I know that this is problematic because not all m57sli boards are SPI, but .. do anyone have a better idea how to handle this?..
Signed-off-by: Florentin Demetrescu echelon@free.fr
I (Ward) have verified your patch on a rev2 of this board (it works!) as well as on a rev1 (plcc). It does not affect flashing on rev1 nor have any averse side effects that I noticed, so I think this patch should go in.
Acked-by: Ward Vandewege ward@gnu.org Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Build Log: Compilation of amd:serengeti_cheetah_fam10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3088&device=serengeti_c...
If something broke during this checkin please be a pain in ward's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should be backed out.
Best regards, coreboot automatic build system