RE: Hypertransport Speed

[YhLu]

For 1)
Please don't do that on amd8131_800Mhz.

Also I suggest you need to check the CPU rev to decide if set to 1GMhz.

For 2)
That bit only control x4 DIMM, So please don't do that on x8 or x16. All the
Normal BIOS only compare that to 4  only, and AMD document only said x4
Only.

For 3) 
Should be OK.

YH
> -----Original Message-----
> From: Stefan Reinauer [mailto:[e-mail]] 
> Sent: Wednesday, January 26, 2005 2:17 AM
> To: [e-mail]
> Subject: Hypertransport Speed
>
> Hi,
>
> I would like to check the applied patch into LinuxBIOS CVS if 
> nobody happens to disagree loudly:
>
> hypertransport clocking
>
> This patch allows to disable the speed cuts during hypertransport
> setup using cmos variables "amdk8_1GHz" and "amd8131_800MHz". 
> I've tried them on hardware which worked perfectly fine
> with the higher speed links for both devices (K8 and 8131).
> Since it is disabled per default and needs cmos and compile time 
> activation, it will not break anything.
>
> Affected files:
>  src/config/Options.lb
>  src/devices/hypertransport.c
>  src/northbridge/amd/amdk8/coherent_ht.c
>  src/northbridge/amd/amdk8/incoherent_ht.c
>
> ram init
>
> This patch allows to use 8x (and probably 16x) dimms with LinuxBIOS
> on K8.
>
> Affected files:
>   src/northbridge/amd/amdk8/raminit.c
>
> Debugging
> This patch will print the pci vendor/device id in
>
> print_pci_devices()
>    which makes determining the early bus structure a lot easier.
>
> It also only prints the first 128 bytes of SPDROM during 
>    dump_spd_registers() since they are defined to be 128byte.
>
> Affected files:
>     src/northbridge/amd/amdk8/debug.c
>
> Stefan