the cs5530 also mentioned that for an external setup some SMM trap needs to be disabled.
Can you have a second look to the cpu_setup section under /src/cpu/amd/model_gx1
I have read this again and again, but for me it seems there are some false writings to the registers.
However, the datasheet says, that the SMM bit can only be set, if CCR3 is 0 or the CPU is in SMI mode.
If I'm right, this bit is not correct set, doesn't matter default is 00 and so there should be no SMM.
Later CCR3 is set to 0x14 in that case there is a try to set a reserved bit. I'm not sure what happens in those case.
Also there is a third write to CCR3 0xf8 for that write the SUSP_SSM_EN bit is set to 1 whatever this means ;)
Datasheet page 50 - 56
I'll let Steve comment on all this before I try to wrap my head around it.
-- Richard A. Smith