[coreboot] Re: Flashing coreboot and Intel Flash Descriptor Erase Issue

[Balaji Sivakumar]

I have added Denverton support in the flashrom and I found that SMM
Protection is enabled from the logs.

I have tried to disable it using setcpi utility and it remains the same
value. Also the flashrom utility also tries but it remains the same.

Warning: BIOS region SMM protection is enabled!
Warning: Setting Bios Control at 0xdc from 0xab to 0x89 failed.

Also FLOCKDN=1 is set as 1 as well.

I can clearly tell the BIOS region is read and writable but Protected
registers are read only that's also the reason I am not able to write the
BIOS region.

What are the options/methods to unlock / disable the Bios Write
enable(BIOS_CNTL) or to access the HSFS registers to set the FLOCKDN bit to
0.

Any pointers would be appreciated!

On Sun, Oct 18, 2020 at 4:20 PM Balaji Sivakumar 
wrote:
> There is some documentation in the tree to help explain the "opaque flash
> chip":
> https://review.coreboot.org/cgit/flashrom.git/tree/Documentation/mysteries_i...
>    Thank you David for the details, I will go through this.
>
>
>
> You will also need to enable host CPU write access to other regions you
> with to be writeable. From your earlier e-mail it appears that you've
> already done this for the ME region, however you'll need to do it for IFD
> and other regions you wish to update. Be advised, however, that *not*
> locking certain regions may cause the ME to behave differently.
>      I have enabled Read write access to the Host CPU Bios, Intel
>
> ME and have verified it in the flash descriptor file as well. Also I have
> unlocked it again using IFDtool as well.
>
> You can also target specific regions for updates using `--ifd -i <region>
> -N`, for example `--ifd -i bios -N` will make flashrom only attempt to
> write and verify the BIOS region (without -N flashrom will attempt to
> verify the entire chip contents).
>    Sure I will try with -N option. I have tried it without the N
>
> option and Bios section alone,It failed to erase. I could see from the logs
> BIOS region SMM protection is enabled and changing it to writable at Bios
> control failed(Warning: Setting Bios Control at 0xdc from 0xab to 0x89
> failed).It remains with oldervalue.
>
> On Sun, Oct 18, 2020 at 2:42 PM David Hendricks 
> wrote:
> > On Sun, Oct 18, 2020 at 8:52 AM Balaji Sivakumar <
> > [e-mail]> wrote:
> > > Thank you Peter for the details. Yes it is identifying it as opaque
> > > flash chip. We are able to completely read it but erase fails.
> >
> > There is some documentation in the tree to help explain the "opaque flash
> > chip":
> > https://review.coreboot.org/cgit/flashrom.git/tree/Documentation/mysteries_i...
> > > I understood from the logs of flashrom that SMM protection is enabled.
> > > Working on it to disable it.
> >
> > You will also need to enable host CPU write access to other regions you
> > with to be writeable. From your earlier e-mail it appears that you've
> > already done this for the ME region, however you'll need to do it for IFD
> > and other regions you wish to update. Be advised, however, that *not*
> > locking certain regions may cause the ME to behave differently.
> >
> > You can also target specific regions for updates using `--ifd -i <region>
> > -N`, for example `--ifd -i bios -N` will make flashrom only attempt to
> > write and verify the BIOS region (without -N flashrom will attempt to
> > verify the entire chip contents).