I've finally got LinuxBIOS up and booted to on our Intel 440BX board.
I know the 440BX code was listed as working but after going through a lot of the raminit.inc code I don't see how it would have ever worked.
Frirst the DRB register was not getting set properly for bank 1. It always ended up as 00.
The original code set the PGPOL, DRB and RPS registers all in the same loop and was very confusing. Looking through some of the code for the other northbridges I saw that these functions were spilt up and much easier to follow. So I wholesale replaced that multi-purpose loop with 3 seperate routines that I scrounged from the 440gx and Erik's general purpose spd code.
Interesting to note that the return value from the 440bx smbus_read_byte is exactly opposite from all the other smbus_read_byte implementations.
That fixed the DRB problem.
The next problem has me very confused. The RPS code sets the RPS for a page size of 4kb. A few debug statements in the RPS routine show that 4kb is indeed the correct value according to whats in the SPD.
However, It dosen't work. Doing some compareing with a COTS bios shows that register set up for a page size of 8kb. Hardcode that value in after all the spd configure code is done and up it comes.
Any ideas on why I have to feed it a bogus page size to work? Its not registered memory.
I'm trying to gather up a few other sticks and see if it only with this brand of memory or in general.