On 9/21/07, Marc Jones marc.jones@amd.com wrote:
OK. I think is see the problem. Bus Master Enable and Memory Enable aren't enabled in the command register. I am not sure why the Memory Enable isn't set. LinuxBIOS should set that and this seems to be a problem in the LB generic pci init code (Anyone care to debug this?).
Oh boy. memory enable only gets set if the part has memory resources. does it? I just jumped into the middle of this thread.
I think that the driver should enable the Bus Master and LB shouldn't need to touch it (I would be interested in other opinions on this).
You are right.
ron