Hi
I'm trying to implement a few features on x86 platforms to improve coreboot. Currently I'm focusing on unifying the bootflow of x86 platforms a little better. An important aspect of that is to make sure program boundaries within stages are respected, which is mostly an issue when romstage destroys the stack+environment in which it is running. Currently many platforms work around it by having code to fetch the global variables which are either still in the CAR (before CAR tear down) or somewhere relocated in cbmem after cbmem has been set up. A better solution is to have CAR being torn down in a separate stage, which means that romstage can always access global variables where the linker initially puts them. We call this stage postcar stage.
I have an implementation ready for the following platforms: * CPU_AMD_MODEL_10XXX or in mainboard terms: amd/serengeti_cheetah_fam10 asus/kfsn4-dre hp/dl165_g6_fam10 msi/ms9652_fam10 supermicro/h8dmr_fam10 supermicro/h8qme_fam10 tyan/s2912_fam10 amd/mahogany_fam10 gigabyte/ma78gm iei/kino-780am2-fam10 jetway/pa78vm5 amd/tilapia_fam10 asus/m4a78-em asus/m4a785-m asus/m4a785t-m asus/m5a88-v gigabyte/ma785gm gigabyte/ma785gmt avalue/eax-785e amd/bimini_fam10 advansus/a785e-i asus/kcma-d8 supermicro/h8scm_fam10 asus/kgpe-d16
It would be great if the following patches could be tested (i.e. does it still boot): https://review.coreboot.org/c/coreboot/+/30063/2 https://review.coreboot.org/c/coreboot/+/30064/2 preferably on a board on which ACPI S3 resume is implemented (select HAVE_ACPI_RESUME).
* NORTHBRIDGE_VIA_VX900 on the VIA EPIA-M850 board https://review.coreboot.org/c/coreboot/+/30057/1 https://review.coreboot.org/c/coreboot/+/30058/3
The only remaining targets that need to be addressed before the special logic for CAR globals can be dropped are FSP1.0 platforms and geode_lx. geode_lx still has to implement EARLY_CBMEM (requirement for 4.7 and 4.9 is coming soon)...
Kind regards
Arthur Heymans