what's other SPD about your DIMM? Brand & model....
That bit means x4 DIMM.
YH
-----Original Message----- From: Stefan Reinauer [mailto:stepan@openbios.org] Sent: Sunday, January 23, 2005 2:48 PM To: linuxbios@clustermatic.org Cc: yhlu@tyan.com Subject: error in k8 ram setup
Hi,
The following function in freebios2/src/northbridge/amd/amdk8/raminit.c is obviously wrong.
static int update_dimm_x4(const struct mem_controller *ctrl, const struct mem_param *param, int i) { uint32_t dcl; int value; int dimm; value = spd_read_byte(ctrl->channel0[i], 13); if (value < 0) { return -1; } dimm = i; dimm += DCL_x4DIMM_SHIFT; dcl = pci_read_config32(ctrl->f2, DRAM_CONFIG_LOW); dcl &= ~(1 << dimm); if (value == 4) { dcl |= (1 << dimm); } pci_write_config32(ctrl->f2, DRAM_CONFIG_LOW, dcl); return 1; }
Especially the part that checks the Primary SDRAM Width for a value of 4. The SPD roms I am using have the value 8 in there and memory does not initialize correctly.
Checking (value == 4 || value == 8) or (value >= 0x4) helps, but I have no idea whether that is correct. It appears that something else has to be done. I've also seen RAMs with a value of 0x10.
Comments? Otherwise I am going to check (value >= 0x4) in somewhen next week.
Stefan