[coreboot] r1050 - in coreboot-v3: mainboard/kontron/986lcd-m northbridge/intel/i945 southbridge/intel/i82801gx

Author: rminnich
Date: 2008-11-24 22:15:19 +0100 (Mon, 24 Nov 2008)
New Revision: 1050

Modified:
   coreboot-v3/mainboard/kontron/986lcd-m/irq_tables.h
   coreboot-v3/northbridge/intel/i945/raminit.c
   coreboot-v3/southbridge/intel/i82801gx/Makefile
   coreboot-v3/southbridge/intel/i82801gx/smmrelocate.S
Log:
Simple typos and fixups. This is almost building.

Signed-off-by: Ronald G. Minnich 
Acked-by: Ronald G. Minnich

Modified: coreboot-v3/mainboard/kontron/986lcd-m/irq_tables.h
===================================================================
--- coreboot-v3/mainboard/kontron/986lcd-m/irq_tables.h	2008-11-24 17:28:26 UTC (rev 1049)
+++ coreboot-v3/mainboard/kontron/986lcd-m/irq_tables.h	2008-11-24 21:15:19 UTC (rev 1050)
@@ -19,8 +19,6 @@
  * MA 02110-1301 USA
  */

-#include <arch/pirq_routing.h>
-
 const struct irq_routing_table intel_irq_routing_table = {
    PIRQ_SIGNATURE,  /* u32 signature */
    PIRQ_VERSION,    /* u16 version   */

Modified: coreboot-v3/northbridge/intel/i945/raminit.c
===================================================================
--- coreboot-v3/northbridge/intel/i945/raminit.c	2008-11-24 17:28:26 UTC (rev 1049)
+++ coreboot-v3/northbridge/intel/i945/raminit.c	2008-11-24 21:15:19 UTC (rev 1050)
@@ -930,7 +930,7 @@
    DQ2330, NC,      CTL3215, NC,      CLK2030, CLK2030, DQ2030, CMD3210  
 };

-static const u32 * map(u32 *table, unsigned int i){
+static const u32 * map(const u8 *table, unsigned int i){
    const u32 *p = NULL;
    switch(table[i]) {
    	case NC: p = nc; break;
@@ -949,8 +949,6 @@

static void sdram_rcomp_buffer_strength_and_slew(struct sys_info *sysinfo)
 {
-	u32 *table;
-
 #if 0
    static const u32 const * const dual_channel_slew_group_lookup[] = {
    	dq2030, cmd3210, ctl3215, ctl3215, clk2030, clk2030, dq2030, cmd3210, 
@@ -1072,7 +1070,7 @@
    };

const u8 * strength_multiplier;
-	const u32* const * slew_group_lookup;
+	const u8* const * slew_group_lookup;
    int idx;

/* Set Strength Multipliers */
@@ -1081,12 +1079,12 @@
    if (sdram_capabilities_dual_channel()) {
    	printk(BIOS_DEBUG, "Programming Dual Channel RCOMP\n");
    	strength_multiplier = dual_channel_strength_multiplier;
-		slew_group_lookup   = dual_channel_slew_group_lookup;
+		slew_group_lookup  = dual_channel_slew_group_lookup;
    	idx = 5 * sysinfo->dimm[0] +  sysinfo->dimm[2];
    } else {
    	printk(BIOS_DEBUG, "Programming Single Channel RCOMP\n");
    	strength_multiplier = single_channel_strength_multiplier;
-		slew_group_lookup   = single_channel_slew_group_lookup;
+		slew_group_lookup = single_channel_slew_group_lookup;
    	idx = 5 * sysinfo->dimm[0] + sysinfo->dimm[1];
    }

@@ -1105,8 +1103,6 @@
    sdram_write_slew_rates(G1SRPUT, map(slew_group_lookup, idx * 8 + 0));
    sdram_write_slew_rates(G2SRPUT, map(slew_group_lookup, idx * 8 + 1));
    if ((map(slew_group_lookup, idx * 8 + 2) != nc) && (sysinfo->package == SYSINFO_PACKAGE_STACKED)) {
-		
-		
    	sdram_write_slew_rates(G3SRPUT, ctl3220);
    } else {
    	sdram_write_slew_rates(G3SRPUT, map(slew_group_lookup, idx * 8 + 2));

Modified: coreboot-v3/southbridge/intel/i82801gx/Makefile
===================================================================
--- coreboot-v3/southbridge/intel/i82801gx/Makefile	2008-11-24 17:28:26 UTC (rev 1049)
+++ coreboot-v3/southbridge/intel/i82801gx/Makefile	2008-11-24 21:15:19 UTC (rev 1050)
@@ -39,8 +39,17 @@
    		$(src)/southbridge/intel/i82801gx/libsmbus.c \
    		$(obj)/southbridge/intel/i82801gx/smmrelocate.o \

+ifeq ($(CONFIG_PIRQ_TABLE),y)
+STAGE2_CHIPSET_SRC += $(src)/southbridge/intel/i82801gx/irq_tables.c
+endif
+
 $(obj)/southbridge/intel/i82801gx/smmrelocate.o:	$(src)/southbridge/intel/i82801gx/smmrelocate.S
-	as -o $@ $<
+	$(Q)mkdir -p $(dir $@)
+	$(Q)printf "  CC      $(subst $(shell pwd)/,,$(@))\n"
+	$(Q)$(CC) -E $(COREBOOTINCLUDE) -I$(src)/northbridge/intel/i945 $< \
+		-o $(obj)/southbridge/intel/i82801gx/smmrelocate.s 
+	$(Q)printf "  AS      $(subst $(shell pwd)/,,$(@))\n"
+	$(Q)$(AS) $(obj)/southbridge/intel/i82801gx/smmrelocate.s -o $@

STAGE0_CHIPSET_SRC += \
    				$(src)/southbridge/intel/i82801gx/stage1_smbus.c \

Modified: coreboot-v3/southbridge/intel/i82801gx/smmrelocate.S
===================================================================
--- coreboot-v3/southbridge/intel/i82801gx/smmrelocate.S	2008-11-24 17:28:26 UTC (rev 1049)
+++ coreboot-v3/southbridge/intel/i82801gx/smmrelocate.S	2008-11-24 21:15:19 UTC (rev 1050)
@@ -19,8 +19,8 @@
  * MA 02110-1301 USA
  */

-#include <arch/asm.h>
-#include "../../../../src/northbridge/intel/i945/ich7.h"
+#define ASSEMBLY
+#include <ich7.h>

#undef DEBUG_SMM_RELOCATION
 //#define DEBUG_SMM_RELOCATION