Anton wrote:
P.S. Flash chip is *infamous* SST25LF080A :-)
Ah, flashrom of course does not support SPI chips.
Yep. Solutions / ideas?
olpcflash should work.
He-he. SST and Winbond are there :)
olpcflash will not work. olpcflash does very specific things that are only valid on a ENE EC. olpcflash deals with the flash in what the ene calls "firmware" mode. Where each SPI byte you write to the SPI bridge gets put directly on the SPI bus. It does this via IO access to the EC.
The SPI bridge in the ICH7 does not work that way. The SPI registers are memory mapped and it looks like you fill some registers with the Op codes you want to run, some registers with the Data and then some other registers with the address and say go.
I also see some stuff that may pose a problem.
5.25.5.1 BIOS Range Write Protection The ICH7 provides a method for blocking writes to specific ranges in the SPI flash when the Protected BIOS Ranges are enabled. This is achieved by checking the Opcode type information (which can be locked down by the initial Boot BIOS) and the address of the requested command against the base and limit fields of a Write Protected BIOS range.
Note: Once BIOS has locked down the Protected BIOS Range registers, this mechanism remains in place until the next system reset.
This is the same style of thing that OLPC is using. Once you set the write protect it can only be cleared by a system reset.
So if they have some sort of fallback mechanism that they never want overwritten they could set the bios that range and then we will not be able to overwrite it.
Some sort of exploit or chip removal would be the only way to reprogram it if thats the case.