Hi Wim,
Thank you very much for your reply.
Best regards. Zvika
On Wed, Feb 20, 2019 at 10:14 AM Wim Vervoorn wvervoorn@eltan.com wrote:
Hello Zvi,
The Baytrail FSP doesn’t support the debug levels.
So unfortunately this will not help you.
Most likely your issue is in the memory configuration. What you can do is have a look at the port 80 codes. This provides an indication of where the problem is in the FSP.
Best regards,
Wim Vervoorn
*From:* Zvi Vered [mailto:veredz72@gmail.com] *Sent:* Saturday, February 9, 2019 12:24 PM *To:* coreboot@coreboot.org *Subject:* [coreboot] 4.9: FSP debug level (0-3)
Helllo,
I'm porting core boot to a bay trail board.
I noticed that starting from version 4.9, I can set the debug level of FSP.
I downloaded FSP for Bay trail and used Intel's BCT to modify it.
But coreboot hangs after calling to the FSP binary.
How can I use the "FSP debug level" ?
Thank you,
Zvika
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