2015-02-19 21:12 GMT+01:00 Peter Stuge peter@stuge.se:
I think the question is really what we would gain from this.
I think it's less about performance and more about an accurate and clean model being available to mainboard code when needed. From discussing things with Werner, one of his concerns (as I
understood them) was higher stability in light of picky I2C devices: When you schedule the entire communication in one pass, the (sufficiently capable) controller makes sure that things happen in the right order and at the right time. If some of that is arbitrated by CPU code, there's more room for error.
Even for the I2C controllers that essentially bitbang things with no help by the controller chip, that should help avoid mistakes, since all the nasty warts of I2C (of which were seem to be many) are managed in the bus driver, not in every single slave driver.
Patrick