what payload is being used here? If SeaBIOS, you'd ideally want SeaBIOS to run the VGA BIOS, not coreboot (in which case, only the oprom name in cbfs needs to match the PCI ID, not the one in the VBIOS header - only coreboot checks that). You'd set coreboot's display init to none, and simply include the VBIOS and set the PCI ID to match. That's what I'm doing here for the Purism Librem 13v4/15v4 boards (which are loosely RVP3-based). Might not hurt to do a 'make savedefconfig' and reply with the contents of defconfig (stripping your board's make/model if needed)
On Mon, Feb 18, 2019 at 11:08 PM Alex Feinman alexfeinman@hotmail.com wrote:
Nico, thank you.
I got it to work after enabling the VGA ROM (instead of the GOP driver) and, on advise of a colleague, changing the PCI ID in the VBIOS header from 8086:0406 to the one matching my hardware. Now I see the 0xc0000 segment and intelvbttool can decode VBT. However there is a remaining issue - the video on boot is not present and only comes up when Linux boots. I feel like I need the GOP driver after all.
Best regards Alex
From: Nico Huber nico.h@gmx.de Sent: Saturday, February 16, 2019 11:05 AM To: Alex Feinman; coreboot@coreboot.org Subject: Re: [coreboot] VBIOS/VBT in Coreboot
Hello Alex,
On 16.02.19 18:39, Alex Feinman wrote:
In my Coreboot build I provide both VBIOS and VBT blobs via appropriate configuration items. The VBIOS blob contains expected signature at the top and VBT is valid as confirmed by running intelvbttool against it. The platform is slightly modified kblrvp (RVP3).
AIUI, you only need the VBT. If you are not going to run the VBIOS, you don't need that one.
During the build I can see cbfstool reporting that both blobs were placed in the image: To see the image's read-only sections as well, rerun with the -w option.
However, once the system boots, the VBIOS is not found at address 0xc0000
You'd have to tell coreboot or a payload to load the VBIOS. AFAIK, coreboot only does it when you also tell it to use it for gfx init (`VGA_ROM_RUN`).
and VBT cannot be located either. I need VBT to be accessible in order to specify the DP connector configuration for eDP. Suggestions are appreciated
Maybe check the coreboot console for clues. For instance there should be a line "ACPI: * IGD OpRegion" telling us that an OpRegion is set up that points to the VBT.
If that doesn't happen, one possible cause is that your processors SKU isn't listed here: `src/soc/intel/common/block/graphics/graphics.c:108`. There is no reliable public source for these IDs. So it's hard to tell if the list is comprehensive.
In any case, please report back. If you can't find a solution, please point to the exact code you are using and attach your `.config` file.
Nico _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org