Am 09.01.2010 02:34, schrieb Kevin O'Connor:
config XIP_ROM_BASE hex default 0xfff00000
config XIP_ROM_SIZE hex default 0x100000
to the Kbuild file to force code caching. (Though, I'm not sure how much of this is because of other changes in my tree to enable caching.)
Intel and AMD CAR use an automatically adapted variable to retarget the XIP area (without changing to change the size): #if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE #endif movl $REAL_XIP_ROM_BASE, %eax orl $MTRR_TYPE_WRBACK, %eax wrmsr
instead of movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
I'm not sure at which point XIP is configured on your system, maybe this helps.
Patrick