10 May
2006
10 May
'06
7:45 p.m.
Peter Stuge schrieb:
On Wed, May 10, 2006 at 07:04:14PM +0200, Christian Sühs wrote:
should it be addl or andl, 0x9fffffff ??
andl, intent is to clear bits 2,1 in the top nibble.
However I have tried both and for both cases it fails.
I think is it not possible to easy write to cr0, I will try the patch later in the code after enabling these registers.
Hmm, cr0 should always be available..
//Peter
Could be the patch wrong?
In cache.h the enable_cache function looks different.
there is a "asm volatile" for read/write operation. movl %%cr0, %0 movl %0, %%cr0
I mean the double "%%"
chris