Li-Ta Lo ollie@lanl.gov writes:
Hello guys,
How does the enumeration decide if the devices in 8111/8131 are on bus 0 or other bus ?
In LinuxBIOS only the cpus are on bus 0, at least when we are done.
Isn't that all these non-coherent devices are on PCIDEV(0,0,0), at power up ? How are they changed to their "real" PCIDEVFN ?
Not quite. Their bridge decides their bus number. The just start out at devfn 0 on which ever bus they are assigned.
We do enumerate one of the chains statically before the general resource allocator hits, and I think we leave it at bus 0.
We are having problems on ibm/e325 that these devices remain on bus 0 such that the current HT and PCI scan or resource allocation is totally fucked. The devices are on bus 0 device 1 or something, these devices are enumerated first than the northbridge so the northbridge does not get correct information about its "link" and can not set IO/MEM/BUS routing correctly (actually it refuse to set at all).
You might need to specify the bridges/busses in Config.lb. I know the current code works and can handle this.
Does anyone can help on this ?
Without something like a serial console trace so that the details of what are going on are clear I don't know.
I have a hunch. The default code for setting things up is for pci devices. In the opteron mainboard files we need to specify non-default operations so we do the hypertransport scan. One of the things that does is to put everything back at devfn 0 if they have changed from someplace else.
amdk8_scan_root_bus very deliberately avoids all of the other functions that are not cpus so if you are using it I don't see how you would run into the problem you have described.
Eric