route_irq15.diff (changes pirq_routing.c): Fixes a off-by-one error when routing the IRQs. This led to IRQ15 not getting assigned.
autoboot_delay.diff (changes filo.c): Fixes compile error when AUTOBOOT_DELAY=0.
dword_copy.diff (changes crt0.S.lb, cache_as_ram.inc (Geode LX)): Speed up copying coreboot to ram by using "movsl" instead of "movsb". Also use different console messages for copying and uncompressing, like it's already done in similar code in other places.
speed_calc.diff (changes raminit.c (Geode LX)): Changed RAM speed calculation to fix RAM modules getting rejected only due to integer rounding errors. Previously, the formula was: speed = 2 * (10000/spd_value) For spd_value=60 this means speed = 2 * 166 = 332, which is less than 333 and coreboot died saying RAM was incompatible. The new formula is: speed = 20000 / spd_value For spd_value=60, speed=333, which is fine.
await_ide.diff (changes ide.c): Made await_ide(), which polls for an ide status change, check the status reg much more often. In my case this reduced the time spent in coreboot by 1.5 sec! The timeout values of course aren't changed, only the granularity. Also, I didn't see any udelay() implementation that looked like it couldn't cope with 10 us delays. (Most are written as for (...) inb(0x80) loops.)
fs_arch.diff (changes ext2fs.c, fat.c): #if ARCH == 'i386' results in a compile error: character constant too long (or something alike). Changed it to #ifdef __i386 I'm unsure if this is correct, though! Why didn't anyone hit this problem before? Is this some ROMCC-special?
it8712_gpio.diff (changes superio.c (IT8712F)): Added the missing I/O resources for IT8712F GPIOs. Our boards need these e.g. to switch the com ports between RS232 and RS485.
Signed-off-by: Jens Rottmann JRottmann@LiPPERTEmbedded.de ---
Above are fixes for some issues I tripped over while working on coreboot support for some of our boards. The patches can be applied in any order. (Should I have sent 7 seperate mails? I deemed it easier this way ...) I'll contribute the actual mainboard files as soon as I'm done.
Regards, Jens Rottmann
Index: src/stream/fs/ext2fs.c =================================================================== --- src/stream/fs/ext2fs.c (revision 3677) +++ src/stream/fs/ext2fs.c (working copy) @@ -239,7 +239,7 @@ * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ -#if ARCH == 'i386' +#ifdef __i386 static __inline__ unsigned long ffz (unsigned long word) { Index: src/stream/fs/fat.c =================================================================== --- src/stream/fs/fat.c (revision 3677) +++ src/stream/fs/fat.c (working copy) @@ -54,7 +54,7 @@
#define FAT_CACHE_SIZE 2048
-#if ARCH == 'i386' +#ifdef __i386 static __inline__ unsigned long log2 (unsigned long word) {
Index: src/superio/ite/it8712f/superio.c =================================================================== --- src/superio/ite/it8712f/superio.c (revision 3677) +++ src/superio/ite/it8712f/superio.c (working copy) @@ -129,7 +129,7 @@ {&ops, IT8712F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xff8, 0}, {0xff8, 4},}, {&ops, IT8712F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xfff, 0}, {0xfff, 4},}, {&ops, IT8712F_KBCM, PNP_IRQ0,}, - {&ops, IT8712F_GPIO,}, + {&ops, IT8712F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, {0xfff, 0}, {0xff8, 0}, {0xff8, 0},}, {&ops, IT8712F_MIDI, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, {&ops, IT8712F_GAME, PNP_IO0, {0xfff, 0},}, {&ops, IT8712F_IR, PNP_IO0 | PNP_IRQ0, {0xff8, 0},},
Index: src/arch/i386/boot/pirq_routing.c =================================================================== --- src/arch/i386/boot/pirq_routing.c (revision 3677) +++ src/arch/i386/boot/pirq_routing.c (working copy) @@ -137,7 +137,7 @@ /* yet not routed */ if (!pirq[link - 1]) {
- for (k = 2; k < 15; k++) { + for (k = 2; k <= 15; k++) {
if (!((bitmap >> k) & 1)) continue;
Index: src/northbridge/amd/lx/raminit.c =================================================================== --- src/northbridge/amd/lx/raminit.c (revision 3677) +++ src/northbridge/amd/lx/raminit.c (working copy) @@ -194,7 +194,7 @@ }
/* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - speed = 2 * ((10000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F)))); + speed = 20000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F));
/* current speed > max speed? */ if (GeodeLinkSpeed() > speed) { @@ -274,15 +274,14 @@ spd_byte = spd_read_byte(DIMM0, SPD_SDRAM_CYCLE_TIME_2ND); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + - (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 1; /* -.5 is a shift of 1 */ /* IF -1 timing is supported, check -1 timing > GeodeLink */ spd_byte = spd_read_byte(DIMM0, SPD_SDRAM_CYCLE_TIME_3RD); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 2; /* -1 is a shift of 2 */ } @@ -306,14 +305,14 @@ spd_byte = spd_read_byte(DIMM1, SPD_SDRAM_CYCLE_TIME_2ND); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 1; /* -.5 is a shift of 1 */ /* IF -1 timing is supported, check -1 timing > GeodeLink */ spd_byte = spd_read_byte(DIMM1, SPD_SDRAM_CYCLE_TIME_3RD); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 2; /* -1 is a shift of 2 */ }
Index: src/boot/filo.c =================================================================== --- src/boot/filo.c (revision 3677) +++ src/boot/filo.c (working copy) @@ -18,7 +18,7 @@ #define autoboot(mem) #endif
-#ifndef AUTOBOOT_DELAY +#if !AUTOBOOT_DELAY #define autoboot_delay() 0 /* success */ #endif
Index: src/pc80/ide/ide.c =================================================================== --- src/pc80/ide/ide.c (revision 3677) +++ src/pc80/ide/ide.c (working copy) @@ -29,6 +29,7 @@ struct controller *ctrl, unsigned long timeout) { int result; + timeout *= 100; /* timeout was ms; finer granularity => reacts faster */ for(;;) { result = done(ctrl); if (result) { @@ -38,7 +39,7 @@ if (timeout-- <= 0) { break; } - udelay(1000); /* Added to avoid spinning GRW */ + udelay(10); /* Added to avoid spinning GRW */ } printk_info("IDE time out\n"); return -1;
Index: src/arch/i386/init/crt0.S.lb =================================================================== --- src/arch/i386/init/crt0.S.lb (revision 3677) +++ src/arch/i386/init/crt0.S.lb (working copy) @@ -74,6 +74,11 @@ movl $_iseg, %edi movl $_eiseg, %ecx subl %edi, %ecx + movb %cl, %al + shrl $2, %ecx + andb $3, %al + rep movsl + movb %al, %cl rep movsb #else leal 4+_liseg, %esi @@ -215,7 +220,11 @@
#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) .section ".rom.data" +#if CONFIG_COMPRESS +str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n" +#else str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" +#endif str_pre_main: .string "Jumping to coreboot.\r\n" .previous
Index: src/cpu/amd/model_lx/cache_as_ram.inc =================================================================== --- src/cpu/amd/model_lx/cache_as_ram.inc (revision 3677) +++ src/cpu/amd/model_lx/cache_as_ram.inc (working copy) @@ -222,6 +222,11 @@ movl $_iseg, %edi movl $_eiseg, %ecx subl %edi, %ecx + movb %cl, %al + shrl $2, %ecx + andb $3, %al + rep movsl + movb %al, %cl rep movsb #else leal 4+_liseg, %esi @@ -363,7 +368,11 @@
#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) .section ".rom.data" +#if CONFIG_COMPRESS +str_copying_to_ram: .string "Uncompressing coreboot to ram.\r\n" +#else str_copying_to_ram: .string "Copying coreboot to ram.\r\n" +#endif str_pre_main: .string "Jumping to coreboot.\r\n" .previous