Hello,
Ühel kenal päeval, P, 2008-07-27 kell 22:11, kirjutas ron minnich:
Index: mainboard/artecgroup/dbe62/initram.c
--- mainboard/artecgroup/dbe62/initram.c (revision 698) +++ mainboard/artecgroup/dbe62/initram.c (working copy) @@ -33,7 +33,7 @@ #include <northbridge/amd/geodelx/raminit.h> #include <spd.h>
-#define MANUALCONF 1 /* Do manual strapped PLL config */ +#define MANUALCONF 0 /* Do manual strapped PLL config */
It's correct to do automatic PLL config from bootstraps here, but this is unrelated to the provided log message
#define PLLMSRHI 0x000003d9 /* manual settings for the PLL */ #define PLLMSRLO 0x07de0080 /* from factory bios */ #define DIMM0 ((u8) 0xA0) @@ -123,6 +123,7 @@ */ int main(void) {
struct msr msr; void dumplxmsrs(void); u8 smb_devices[] = {
@@ -140,7 +141,7 @@ pll_reset(MANUALCONF, PLLMSRHI, PLLMSRLO); printk(BIOS_DEBUG, "done pll reset\n");
cpu_reg_init(0, DIMM0, DIMM1);
cpu_reg_init(0, DIMM0, DIMM1, 0); printk(BIOS_DEBUG, "done cpu reg init\n"); sdram_set_registers();
So we have it unterminated and it was set up as terminated before or that wasn't an issue for your memtest quest?
@@ -152,6 +153,16 @@ sdram_enable(DIMM0, DIMM1); printk(BIOS_DEBUG, "done sdram enable\n");
/* factory bios sets writethrough on RCONF! */
/* This is just a hack put here because no sane mainboard
* would ever require writethrough. This is not worth any
* visibility in Kconfig or dts or anything for that matter.
*/
msr = rdmsr(CPU_RCONF_DEFAULT);
msr.lo |= RCONF_WT(RCONF_DEFAULT_LOWER_SYSRC_SHIFT);
wrmsr(CPU_RCONF_DEFAULT, msr);
printk(BIOS_DEBUG, "Set write through\n");
What's this? Factory BIOS is GSW? Artec LinuxBIOS-v2 branch should be the reference here instead in that case and if that had it write-through, then it might be wrong, would have to check. Also unrelated to the commit log message as provided
dumplxmsrs(); /* Check low memory */ /* The RAM is working now. Leave this test commented out but
Regards, Mart Raudsepp Artec Design LLC