On Tue, 2019-02-26 at 11:16 -0800, ron minnich wrote:
On Tue, Feb 26, 2019 at 6:41 AM Patrick Rudolph patrick.rudolph@9elements.com wrote:
Hi coreboot folks, in order to support TEE like Intel TXT it is necessary to be able to clear all DRAM at boot on request.
As all of the x86 coreboot code is x86_32, it is necessary to make use of PAE to clear memory.
I would much rather we consider getting into the current century and having coreboot be able to run x86_64 :-)
can we do that?
ron
Hi Ron, that's done for x86 qemu here, but is out of the scope of this patch series:
https://review.coreboot.org/#/q/project:coreboot+branch:master+topic:x86_64_...
As we have x86_32 code, the memory clearing code uses PAE for now. I'm happy to see x86_64 running on real hardware, but that would take some time.
As already pointed out, the integration into FSP enabled platforms could become "interresting", that is why PAE is still a "legacy" option.
This patch series is to be used on server platforms where security is more important than short boot times. The additional overhead of clearing memory is expected and can possibly reduced in further patches.
I'm interrested to see if the proposed long mode paging running in compability mode gives significant performance improvements. In the end you often reload page tables as you still can only access 32bit address space.
Regards,