Restarting today from a fresh cloning of coreboot followed by make crossgcc and a configuration of an emulated x86 Q35 (see .config), I run into the two following errors :
1 ~/dev/corebootwks/coreboot $ make
... LD cpu_microcode_blob.o /home/user/dev/corebootwks/coreboot/util/crossgcc/xgcc/bin/i386-elf-ld: no input files make: *** [build/cpu_microcode_blob.o] Erreur 1
# which was solved possibly incorrectly by switching in Chipset Include CPU microcode in CBFS (Generate from tree) to Include CPU microcode in CBFS (Do not include microcode updates)
2 ~/dev/corebootwks/coreboot $ make
... Compiling (16bit) /home/user/dev/corebootwks/coreboot/build/seabios/out/romlayout.o Building ld scripts Version: rel-1.7.2.1-0-g88cb66e-20140314_000452-machine File "./tools/layoutrom.py", line 76 print "Error: Fixed section %s has non-zero alignment (%d)" % ( ^ SyntaxError: invalid syntax make[2]: *** [/home/user/dev/corebootwks/coreboot/build/seabios/out/romlayout16.lds] Erreur 1 make[1]: *** [build] Erreur 2 make: *** [seabios] Erreur 2
# it seems to me that the error is due to Seabios assuming in its Makefile line 65 that PYTHON=python but it should be python2 as the print verb in File "./tools/layoutrom.py", line 76 is a typical python2 statement and not a valid python3 function, and many boxes have today python3 as their default python.
< Suggestions welcome !