Sorry for the long silence - I finally found some time to test the HT patch.
I used coreboot v4.11 as a basis since at this point in time the patch produced merge conflicts with newer commits.
I used memtest86+ v5.01 (forced SMP, RAM: 16GB @ 1600MHz, CPU: Intel i7-3840QM) as mentioned in my last mail. When HT is enabled memtest86+ runs just fine.
When I disable HT it gets reproducibly stuck at test #7 (block move), at 4096M-6144M, with cores 0-2 working, core 3 just switched to "W".
I'll test some other workloads which were problematic in the past (compiling coreboot, watching videos using Firefox).
Shall I provide my .config or any other information?
Regards
lhochstetter
On 11/02/2020 15:23, Lars Hochstetter wrote:
I managed to find some time to run memtest86+ v5.01 as a SeaBIOS payload [1].
As it turns out the RAM went bad - I made sure to check with another pair of sticks. I'll replace the RAM and retry the HT patch when my free time allows for it.
Sorry for creating so much noise over something so simple.
Regards
lhochstetter
[1] https://mail.coreboot.org/pipermail/coreboot/2018-November/087713.html
On 2/8/20 4:23 PM, Lars Hochstetter wrote:
Unfortunately I'll be rather busy until mid April this year - here is my plan for the time being:
I'll reinstall Linux Mint Cinnamon, integrate memtest86+ into coreboot and run it. I'll report back if it's just bad RAM or something else.
Since my T430 was modified a couple times I'd also suggest we try to find someone with a more stock T430 to see if your HT patch works. The X230 somewhere in this thread worked and I'd argue that it does work properly on unmodified Thinkpads.
Sorry for a long reply too. About mrc.bin: no, it's actually possible to use mrc blob on Sandy/Ivy, but as I see it's not supported across all boards. X220 has support, other boards needs patching (or maybe patches are already on gerrit, I'm not sure). It shouldn't be hard to get it working, though.
Can you elaborate on this one? Why does the X220 has support and other Sandy/IvyBridge based laptops are not supported? Wasn't one of the ideas for coreboot to have a more common code base or am I missing something obvious?
Regards
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