Re: [coreboot] Gigabyte M57SLI-S4 PCI-Initialisation Problems

[Peter Stuge]

Hi,

Harald Gutmann wrote:
> As i discussed this point with Peter in #coreboot it we/i got to
> the conclusion that the value i need to start reading in coreboot
> was 3c00.

I didn't properly read the background that the I/O base is set by
SYSCTRL_REG 0x64 so I gave Harald some bad advice, but he's reading
out the relevant values as I type. I hope he'll send out an update
in a bit.

//Peter