YhLu could you please, please, please fix your mailer so it sets In-Reply-To: and References: correctly or could you switch to a mailer that does. Catching up on a conversation like this when all of the threads are chopped in to little pieces is a major pain.
It does not help that you are also top posting which is a terrible way to quote text. Putting the text you are replying to above what you are quote is usually much more readable.
YhLu YhLu@tyan.com writes:
Li-Ta Lo ollie@lanal.gov writes:
On Fri, 2005-01-14 at 12:45, YhLu wrote:
I check the amd_early_mtrr.c with old amd earymtrr.inc. It seems the only difference is not enable SYSCFG_MSR_MtrrFixDramModEn before clear MTRR fixed.
Did I miss that. It should be a simple fix?
Probably I didn't commit all the old code I used to have. Anyway, the things we have to do in early_mtrr.c are:
- enable SYSCFG_MSR_MtrrFixDramModEn
- set fixed mtrrs for 0-0x9FFFF and 0xC0000-0xFFFFF
as WB and READ_MEM and WRITE_MEM 3. set fixed mtrrs for 0xA0000-0xBFFF to UC
The attributes should come naturally from the systems memory map.
- disable SYSCFG_MSR_MtrrFixDramModEn
- enable SYSCFG_MSR_MtrrFixDramEn
I think substantially we did all of that prior to this conversation.
I enable that, but the result shows no change....
I add the code to amd_earlymtrr.c but found two problem
- in the cpu init, the second cpu cache can not be enabled. (still using
value set by amd_earlymtrr.c). ( before the amd_mtrr.c called by init).
???? YhLu you have a bug in your cpu initialization code. It sounds like something has broken in the dual core cpu setup.
- some slow in auto.c stage. Maybe because of before enable cache for
LinuxBIOS rom flash, there is more instruction to enable fixed mtrrs.
So I prefer to two phase dev_init loop.
Ok we have a dependency order in the running of the init routines. Ouch.
How about something very simple. We can put the bus for the cpus before any of the inboard devices. The cpus are the special case here not the pci video card. It is the cpus that should get the special handling. We may need to move the cpu initialization up into the enable_resources phase of everything if simply reordering the buses in Config.lb is not enough.
Eric