THOSE adapters only reroute some signals. they leave the vcore generation completely untouched and you can easily burn your board's regulators.
How? I thought FC-PGA2's have a lower voltage requirment than FC-PGA's.
yes, lower voltage but HIGHER current. the problem is that the mosfets drivers are not capable of driving such high currents. in general the complete circuit (capacitors, inductors, diodes) is not designed for the current requirements. even IF the
but apart from all this: the bios (not even linuxbios) can distinguish between a fcpga/fcpga-ii board and a ppga only board.
That's a good thing right? This way you can do some things you normally wouldn't be able to do. Like, the wiki home page says "Various non-standard scenarios (e.g. FPGA in Opteron socket)"
well..this kinda makes things complicated. LB has to contain handling routines for all intel processors. handling can differ between models even if they are one family. a good thing is: handling routines can be divided into core handling routines ex. all coppermine processors have the same initialization and handling routine.
as i already stated the problems that Uwe had with his M6178 mainboard booting dead slow was the missing L2 cache initialization routine for the cpu he used.
LB should contain handling routines for all processors that COULD be run on a mainboard. on a VIA 694x slot 1 mainboard you could run everything from intel pentium ii 233 to intel pentium iii tualatin 1.4GHz
Correct me if I am wrong, but isn't it ok if the LB processor code is a bit generic. All it needs to do is get Linux going and as long as the Linux kernel is able to detect the processor (vender/device id, etc) it can take over and unleash the processors full capabilities?
another problem: the kernel relies on the bios setting up the processor correctly but only partly..it's a real pain. some things are done by the kernel and some things are not.
case 1: if you start the kernel with a intel pentium iii with disabled L2 cache the kernel will leave it unconfigured. you will run a processor without L2 cache then. case 2: if you start the kernel with a cyrix 6x86(MX) various cpu registers are altered that (can) affect performance (and power consumption). the same if you run an AMD K6(-2/-III).
so LB has to set up all hardware registers (in this case: the cpu registers) to correct values. we can not (and we should not) rely on the kernel to do the work. and in my understanding the kernel either shouldn't alter any of those registers or set up all registers correctly. Holger