On Fri, Nov 14, 2008 at 10:02 PM, Corey Osgood corey.osgood@gmail.com wrote:
Sure there are, CN700 in v2 uses a safe (read: slowest possible) set of timings that seems to work on all the memory I've thrown at it. AFAIK DDR2 doesn't like running too much slower then spec, but it can handle quite a bit.
I used to try to use this approach and had only mixed luck with it. I am glad it works on the VIA but I don't think we can count it working in the general case.
Also, I learned the hard way that some DRAM controllers reset completely when you change ANY timing registers and the result is you lose all contents of DRAM.
It's very hard to get a general solution to DRAM that will work on all chipsets.But picking safe initial timing is without a doubt the one of the hardest problems.
thanks
ron