Kevin O'Connor kevin@koconnor.net writes:
and the original patch from mondrian to add support for the dl145g3 to filo: http://merlin.ugent.be/~samuel/dl145g3/patch/filo_dl145_sata.patch
It looks rather simple but I don't see what i have to change in seabios to support the device.
The pci id (0x104 is already in pci_ids.h of seabios) so i would think it should just work. Myles thought it could be related to the fact that his sata interface of this mainboard does not support a legacy IDE interface mode.
You have any ideas how i could quickly add support for the hp dl145 g3 to SeaBIOS??
The equivalent patch in SeaBIOS would look like:
--- a/src/ata.c +++ b/src/ata.c @@ -841,7 +845,8 @@ ata_init() int count=0; int bdf, max; foreachpci(bdf, max) {
if (pci_config_readw(bdf, PCI_CLASS_DEVICE) != PCI_CLASS_STORAGE_IDE)
u16 class = pci_config_readw(bdf, PCI_CLASS_DEVICE);
if (class != PCI_CLASS_STORAGE_IDE && class != PCI_CLASS_STORAGE_RAID) continue; if (count >= ARRAY_SIZE(ATA.channels)) break;
I ran into this same issue when porting the dl165g3 board. I was able to get SeaBIOS to boot from my SATA disks by applying the following:
--- a/src/ata.c +++ b/src/ata.c @@ -967,7 +967,8 @@ ata_init(void) int bdf, max; foreachpci(bdf, max) { pcicount++; - if (pci_config_readw(bdf, PCI_CLASS_DEVICE) != PCI_CLASS_STORAGE_IDE) + u16 class = pci_config_readw(bdf, PCI_CLASS_DEVICE); + if (class != PCI_CLASS_STORAGE_IDE && class != PCI_CLASS_STORAGE_RAID) continue;
u8 pciirq = pci_config_readb(bdf, PCI_INTERRUPT_LINE); @@ -983,7 +984,7 @@ ata_init(void) }
u32 port1, port2, irq; - if (prog_if & 1) { + if ((prog_if & 1) || (class != PCI_CLASS_STORAGE_IDE)) { port1 = pci_config_readl(bdf, PCI_BASE_ADDRESS_0) & ~3; port2 = pci_config_readl(bdf, PCI_BASE_ADDRESS_1) & ~3; irq = pciirq; @@ -995,7 +996,7 @@ ata_init(void) init_controller(count, bdf, irq, port1, port2, master); count++;
- if (prog_if & 4) { + if ((prog_if & 4) || (class != PCI_CLASS_STORAGE_IDE)) { port1 = pci_config_readl(bdf, PCI_BASE_ADDRESS_2) & ~3; port2 = pci_config_readl(bdf, PCI_BASE_ADDRESS_3) & ~3; irq = pciirq;