Mark C. Mason wrote:
We were able to resolve this by enabling MSI interrupts in our PCIe core and our Linux device driver.
That's a good workaround, but clearly doesn't actually resolve the problem. The problem still exists; coreboot fails to initialize the system completely in some cases.
I don't think that's very useful. It is perfectly fine to have known limitations, we are all short on time, but all coreboot developers out there, please hear this plea:
If you contribute some code which you know to leave huge gaps in functionality gaping open then you need to DOCUMENT that, or of course ideally close the gaps before publishing the code in the first place.
If you *don't know* whether there are gaps, then you can be pretty sure that there are plenty of them.
Worthless coreboot code is worthless.
I don't think we are all working on coreboot so that we can create a hotchpotch of random blobs and million line code drops - at least I'm not.
Are you?
//Peter