2012/7/14 Motiejus Jakštys desired.mta@gmail.com:
On Fri, Jul 13, 2012 at 10:43 AM, Motiejus Jakštys desired.mta@gmail.com wrote:
On Thu, Jul 12, 2012 at 1:26 PM, Tomasz Ostaszewski ostaszewski.tomasz@gmail.com wrote:
Hi Peter, Motiejus, Tried to ask on the flashrom mailing list but to no response. There is a thread about the X60s update from stock BIOS to coreboot using flashrom (http://comments.gmane.org/gmane.linux.bios/69354). In this thread Peter says that one needs:
- flashrom;
- patches to the above;
- bucts utility from git;
Flashrom is avaiable via SVN, bucts via git but where to get the patches from? Are there already integrated into flashrom trunk?
Hi, I created the patch basing on this description:
Patch flashrom to use RES1 SPI identification and spi_chip_write1 for your flash chip, as well as change the flash chip model id to fit the RES1 command.
Took some time to think, but eventually it made sense and worked. I will look for the actual patch this weekend and, if I have/find it, will send it to you.
Hi, here is the diff from current trunk which made Intel ICH7M MX25L1605 flashable:
diff --git a/flashchips.c b/flashchips.c index 0c9f6c4..c9afee1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -4612,7 +4612,7 @@ const struct flashchip flashchips[] = { }, }, .unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.write = spi_chip_write_1, .read = spi_chip_read, .voltage = {2700, 3600}, },
This applies to MX25L4005, why?
@@ -4660,11 +4660,12 @@ const struct flashchip flashchips[] = { .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L1605,
.model_id = 0x14, .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe = probe_spi_res1, .probe_timing = TIMING_ZERO, .block_erasers = {-- Motiejus Jakštys
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