Re: [coreboot] K8 RAMinit problematic code

[Stefan Reinauer]

ron minnich wrote:
> These fixes come in to play once single core is done.
>
> We're going to write this code as always SMP safe, and I want to
> remove the CONFIG_*_SMP conditionals. They make no sense for a bios.

So you say a Geode LX bios should know how to do LAPIC, IOAPIC, INIT
IPI, SIPI, and all that stuff?

These conditionals _might_ make sense to save quite some space. Small
machines often have small flash.

Then there's this other thing... Intel Core (2) Duo/Solo/Quad CPUs
expect the BIOS to send the APs back to sleep. K8 does not do this.
Should we assume we (have to) do this anyways? Might make sense, power
consumption wise, if you're running a non-SMP OS on an SMP K8 system.

Stefan