The only southbridge having a pirq_assign_irqs function (needed for CONFIG_PIRQ_ROUTE) so far is the amd cs5530. Add one for vt8237 too. Setting up the pci routing is important in case you want to boot DOS, OSes that don't support ACPI or MP tables and ROMs for add-in storage controllers may depend on this too. TODO: Fix the 4 routing links limitation in src/arch/i386/boot/pirq_routing.c
Signed-off-by: Tobias Diedrich ranma+coreboot@tdiedrich.de
---
Index: src/southbridge/via/vt8237r/vt8237r_pirq.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ src/southbridge/via/vt8237r/vt8237r_pirq.c 2010-11-07 12:59:34.000000000 +0100 @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 Nikolay Petukhov nikolay.petukhov@gmail.com + * Copyright (C) 2010 Tobias Diedrich ranma+coreboot@tdiedrich.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/pirq_routing.h> +#include <console/console.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <pc80/i8259.h> + +#if (CONFIG_PIRQ_ROUTE==1 && CONFIG_GENERATE_PIRQ_TABLE==1) +void pirq_assign_irqs(const unsigned char route[4]) +{ + device_t pdev; + + pdev = dev_find_device(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_VT8237A_LPC, 0); + + if (pdev) { + pci_write_config8(pdev, 0x55, route[0] << 4); + pci_write_config8(pdev, 0x56, (route[2] << 4) | route[1]); + pci_write_config8(pdev, 0x57, route[3] << 4); + + /* Enable INT[E-H] mapped to INT[A-D] for simplicity */ + pci_write_config8(pdev, 0x46, 0x00); + } +} +#endif Index: src/southbridge/via/vt8237r/Makefile.inc =================================================================== --- src/southbridge/via/vt8237r/Makefile.inc.orig 2010-11-07 12:42:47.000000000 +0100 +++ src/southbridge/via/vt8237r/Makefile.inc 2010-11-07 12:58:53.000000000 +0100 @@ -23,5 +23,5 @@ driver-y += vt8237r_lpc.c driver-y += vt8237r_sata.c driver-y += vt8237r_usb.c -driver-y += vt8237r_nic.c +driver-$(CONFIG_PIRQ_ROUTE) += vt8237r_pirq.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += vt8237_fadt.c Index: src/mainboard/asus/m2v/Kconfig =================================================================== --- src/mainboard/asus/m2v/Kconfig.orig 2010-11-07 12:52:52.000000000 +0100 +++ src/mainboard/asus/m2v/Kconfig 2010-11-07 12:58:53.000000000 +0100 @@ -18,6 +18,7 @@ select RAMINIT_SYSINFO select TINY_BOOTBLOCK select HAVE_PIRQ_TABLE + select PIRQ_ROUTE select HAVE_MP_TABLE select HAVE_ACPI_TABLES