Paul Menzel (paulepanter@users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2374
-gerrit
commit 39ec7610d84672cda1a9c5a784f2763df6e0eb98 Author: Paul Menzel paulepanter@users.sourceforge.net Date: Tue Feb 12 10:32:00 2013 +0100
Google Butterfly: gpio.h: Correct whitespace errors
Correct some whitespace inconsistencies introduced in the following commit.
commit d7bd4eb003f5b6a13943418ae0ac53248a2e34d2 Author: Stefan Reinauer reinauer@chromium.org Date: Mon Feb 11 11:11:36 2013 -0800
Add support for "Butterfly" Chromebook
Reviewed-on: http://review.coreboot.org/2359
Change-Id: Ifeda7eb29ddf855cdfea41ddbd685441ede55756 Signed-off-by: Paul Menzel paulepanter@users.sourceforge.net --- src/mainboard/google/butterfly/gpio.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mainboard/google/butterfly/gpio.h b/src/mainboard/google/butterfly/gpio.h index 5448299..b592e6a 100644 --- a/src/mainboard/google/butterfly/gpio.h +++ b/src/mainboard/google/butterfly/gpio.h @@ -47,7 +47,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = { .gpio21 = GPIO_MODE_GPIO, /* Input - EC_ENTERING_RW for Google OS */ .gpio22 = GPIO_MODE_GPIO, /* Input - BIOS RECOVERY */ .gpio23 = GPIO_MODE_NONE, /* Unused */ - .gpio24 = GPIO_MODE_GPIO, /* Output - DGPU_HOLD_RST# */ + .gpio24 = GPIO_MODE_GPIO, /* Output - DGPU_HOLD_RST# */ .gpio25 = GPIO_MODE_NONE, /* Unused */ .gpio26 = GPIO_MODE_NONE, /* Unused */ .gpio27 = GPIO_MODE_NONE, /* Unused */ @@ -172,7 +172,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = { .gpio33 = GPIO_DIR_INPUT, /* Input */ .gpio34 = GPIO_DIR_INPUT, /* Unused */ .gpio35 = GPIO_DIR_INPUT, /* Unused */ - .gpio36 = GPIO_DIR_OUTPUT, /* Output HIGH */ + .gpio36 = GPIO_DIR_OUTPUT, /* Output HIGH */ .gpio37 = GPIO_DIR_INPUT, /* Input */ .gpio38 = GPIO_DIR_INPUT, /* Input */ .gpio39 = GPIO_DIR_INPUT, /* Input */ @@ -196,7 +196,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = { .gpio57 = GPIO_DIR_INPUT, /* Input */ .gpio58 = GPIO_DIR_INPUT, /* Unused */ .gpio59 = GPIO_DIR_INPUT, /* Unused */ - .gpio60 = GPIO_DIR_OUTPUT, /* Output HIGH */ + .gpio60 = GPIO_DIR_OUTPUT, /* Output HIGH */ .gpio61 = GPIO_DIR_INPUT, /* Unused */ .gpio62 = GPIO_DIR_INPUT, /* Native */ .gpio63 = GPIO_DIR_INPUT, /* Native */ @@ -207,7 +207,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = { .gpio33 = GPIO_LEVEL_LOW, /* Input */ .gpio34 = GPIO_LEVEL_LOW, /* Unused */ .gpio35 = GPIO_LEVEL_LOW, /* Unused */ - .gpio36 = GPIO_LEVEL_HIGH, /* Output HIGH */ + .gpio36 = GPIO_LEVEL_HIGH, /* Output HIGH */ .gpio37 = GPIO_LEVEL_LOW, /* Input */ .gpio38 = GPIO_LEVEL_LOW, /* Input */ .gpio39 = GPIO_LEVEL_LOW, /* Input */ @@ -231,7 +231,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = { .gpio57 = GPIO_LEVEL_LOW, /* Input */ .gpio58 = GPIO_LEVEL_LOW, /* Unused */ .gpio59 = GPIO_LEVEL_LOW, /* Unused */ - .gpio60 = GPIO_LEVEL_HIGH, /* Output HIGH */ + .gpio60 = GPIO_LEVEL_HIGH, /* Output HIGH */ .gpio61 = GPIO_LEVEL_LOW, /* Unused */ .gpio62 = GPIO_LEVEL_LOW, /* Native */ .gpio63 = GPIO_LEVEL_LOW, /* Native */