SPD is some data saved on the memory module, available to the processor to read to find out memory properies. These data are protected by a check code (CRC) which allows the CPU to verify that it read the data correctly. Apparently this check is failing in your case.
Some likely reasons could be a noisy i2c interface (used to read SPD) or someone writing the SPD storage on memory module(s) and corrupteding it.
--vb
On Wed, May 20, 2015 at 8:51 AM, Michael Gerlach n3ph@terminal21.de wrote:
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Hi all,
i was testing coreboot on lenovo x230 with 2x8G DDR3.. Seems like there are some issues regarding the size of the modules..
Best regards,
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