Yes IOMMU works fine with 0x0600111f microcode.
No i dont tried the reversed eng. SMU when it is no already inside coreboot.
I wasnt able to send an email attached with my rom file ... i am not at home right now so i will provied your with a file link to my rom later .. proberally on Tuesday.
IMC was dropped out of the standart config and also out of the nconfig menu as i experienced. You can see this in the absensce of fan control ( what is not problem if you have a FAN that is not extrem loud at 12V)
Am 21.04.19 um 09:29 schrieb Mike Banon:
So IOMMU is working for you even with 0x0600111f microcode installed? That's very good. I wonder what was wrong initially, and hope that you could send a board status report or - at least - please upload your current .config to somewhere (e.g. pastebin) and post a link!
are there any other blobs present in my rom now besides microcode ?
The microcode blob has been present in your coreboot even before my ucode.sh patch, it just was an older 0x0600110f version (more vulnerable to some spectres and perhaps more buggy IOMMU - e.g. at our G505S we could get IOMMU working properly only with this 0x0600111f update).
my build rom in attachment for inspection
I can't see it - perhaps the mailing list didn't accept this big attachment.
AMD SMU firmware
Have you tried running this free firmware replacement (https://github.com/zamaudio/smutool/) and is it working?
You could also check about the IMC. Read the latest messages at this page: https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/IAFQR... They contain the instructions about how to check that your IMC is inactive
On Sat, Apr 20, 2019 at 11:11 AM Kinky Nekoboi kinky_nekoboi@nekoboi.moe wrote:
-------- Weitergeleitete Nachricht -------- Betreff: Re: [coreboot] Re: Fwd: Re: Fwd: F2A85M IOMMU still not working for RIchland CPUS Datum: Thu, 18 Apr 2019 16:24:42 +0200 Von: Kinky Nekoboi <kinky_nekoboi@nekoboi.moe> <mailto:kinky_nekoboi@nekoboi.moe> An: Mike Banon <mikebdp2@gmail.com> <mailto:mikebdp2@gmail.com>, coreboot@coreboot.org <mailto:coreboot@coreboot.org> did this. sudo dmesg | grep microcode [ 1.177705] microcode: CPU0: patch_level=0x0600111f [ 1.177708] microcode: CPU1: patch_level=0x0600111f [ 1.177715] microcode: CPU2: patch_level=0x0600111f [ 1.177722] microcode: CPU3: patch_level=0x0600111f [ 1.177761] microcode: Microcode Update Driver: v2.2. works like a charm. please inform me if this is still the case: (from libreboot side) are there any other blobs present in my rom now besides microcode ? /* my build rom in attachment for inspection. (no vbios included as i mentioned before radeon gpus are not working, i am running an NV GT210 atm) */ AMD SMU firmware Handles some power management for PCIe devices (without this, your laptop will not work properly) and several other power management related features. The firmware is signed, although on older AMD hardware it is a symmetric key, which means that with access to the key (if leaked) you could sign your own modified version and run it. Rudolf Marek (coreboot hacker) found out how to extract this key in this video demonstration <https://media.ccc.de/v/31c3_-_6103_-_en_-_saal_2_-_201412272145_-_amd_x86_smu_firmware_analysis_-_rudolf_marek>, and based on this work, Damien Zammit (another coreboot hacker) partially replaced it <https://github.com/zamaudio/smutool/> with free firmware, but on the relevant system (ASUS F2A85-M) there were still other blobs present (Video BIOS, and others) preventing the hardware from being supported in libreboot. Am 18.04.19 um 15:08 schrieb Mike Banon:Thank you, Nekoboi. If I understand it correctly: you haven't changed anything at coreboot or its' configuration, but your IOMMU suddenly started to work? ;-) (unknown what got it working?) Also, please could you make almost the same coreboot build, with the only difference is these microcodes installed by the unofficial patch: http://dangerousprototypes.com/docs/Lenovo_G505S_hacking#AMD_microcode_updates , and then try it again with the same Linux to see if it's still working. With this patch applied, the microcode level should be 0x0600111f (...1f instead of ...0f) to confirm the successful installation. On Thu, Apr 18, 2019 at 1:35 PM Kinky Nekoboi <kinky_nekoboi@nekoboi.moe> <mailto:kinky_nekoboi@nekoboi.moe> wrote: IOMMU and system still booting without linux kernel level microcode Am 18.04.19 um 11:38 schrieb Kinky Nekoboi:-------- Weitergeleitete Nachricht -------- Betreff: Re: [coreboot] Re: Fwd: F2A85M IOMMU still not working for RIchland CPUS Datum: Thu, 18 Apr 2019 11:38:16 +0200 Von: Kinky Nekoboi <kinky_nekoboi@nekoboi.moe> <mailto:kinky_nekoboi@nekoboi.moe> An: Mike Banon <mikebdp2@gmail.com> <mailto:mikebdp2@gmail.com> CPU : A8-6600K [ 1.271514] microcode: CPU0: patch_level=0x0600110f [ 1.271521] microcode: CPU1: patch_level=0x0600110f [ 1.271532] microcode: CPU2: patch_level=0x0600110f [ 1.271538] microcode: CPU3: patch_level=0x0600110f [ 1.271583] microcode: Microcode Update Driver: v2.2. i compiled from the master tree, build on 16. April 2019 no microcode was included in that build. next step i will try if, the problems occur again if i remove microcode updates via llinux kernel. here is cbmem output as attachment Am 18.04.19 um 06:08 schrieb Mike Banon:also it seems that IOMMU is working now...Congratulations with these amazing news! Please tell, what version of coreboot you've currently installed? Also, have you used this microcode updating patch from DangerousPrototypes page before building your current coreboot build?maybe cause i have microcode updates in the kernel included this time ?By the way, the microcode updates provided by Linux are _older_ than what this "microcode updating patch" is providing : simply because AMD has shared their latest update with some proprietary UEFI makers but didn't share them with the opensource world (and so we had to get them by manually extracting). But if the kernel sees that a newer microcode version is loaded, it doesn't replace it. Please, could you check and tell, what microcode version do you see as installed?_______________________________________________ coreboot mailing list -- coreboot@coreboot.org <mailto:coreboot@coreboot.org> To unsubscribe send an email to coreboot-leave@coreboot.org <mailto:coreboot-leave@coreboot.org>_______________________________________________ coreboot mailing list -- coreboot@coreboot.org <mailto:coreboot@coreboot.org> To unsubscribe send an email to coreboot-leave@coreboot.org <mailto:coreboot-leave@coreboot.org> _______________________________________________ coreboot mailing list -- coreboot@coreboot.org <mailto:coreboot@coreboot.org> To unsubscribe send an email to coreboot-leave@coreboot.org <mailto:coreboot-leave@coreboot.org>_______________________________________________ coreboot mailing list -- coreboot@coreboot.org <mailto:coreboot@coreboot.org> To unsubscribe send an email to coreboot-leave@coreboot.org <mailto:coreboot-leave@coreboot.org>
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