Jeremy Jackson jerj@coplanar.net writes:
Another idea on the subject:
On some chipsets, the entire range of supported processors have MMX and maybe SSE/SSE2. MMX gives 8 extra 64 bit registers (nobody uses floating-point in LinuxBIOS, right?) that can be used as 32bit. They can't be used as address/index/base, but only for data. See the MOVD instruction.
Newer versions of gcc offer to produce code which uses them with -mmmx, -m3dnow, or at least inline asm can use the registers. Might be nice for checksums with the vector instructions also.
Nice I had missed the fact that you can use MOVD with MMX registers. I have used it just a little bit when debugging to access the SSE registers but I didn't need them in production so they did not get used.
I think this is almost justification enough to write a new compiler. 16 extra 32 bit registers that you can use for scratch values on modern cpus. And 8 extra registers on the older cpus.
And using them can be a compile option so the code does not get polluted with strange assumptions.
I won't support those in the very first pass but that is definitely where I am going to work on as soon as I can produce code.
Can you see a way to stuff more than 32bit in there?
Eric