Re: [LinuxBIOS] Add support for Via vt82c686a

[Adam Talbot]

Do we need to update the website to reflect the state of the the via 
vt82c686a, under the "Supported Chipsets and Devices"
-Adam

Corey Osgood wrote:
> Okay, looking further into the archives, and into the very /origins/ 
> of these files, in the original freebios cvs (on sourceforge), it 
> appears that there were a lot more people involved than I've included. 
> This patch has everyone whos made any change to the linuxbios svn 
> whatsoever, I don't think any of them are too trivial, but I haven't 
> got the time to go back and check right now. Most of that content has, 
> over time, been rewritten, but some of it's still intact (mainly in 
> the vtX_ide.c). If someone wants to trace all the changes, be my 
> guest, but I haven't got the time right now. I've updated Mark's 
> email, thanks for getting ahold of him.  Also, by Ron's definition, I 
> probably don't even qualify as a copyright holder...if anyone has a 
> problem with including myself, let me know and I am completely willing 
> to remove it (or it can be removed by someone else), as I don't think 
> I've written any actual code, just changed a few variables here and 
> there.
> Signed-off-by: Corey Osgood
> Index: src/southbridge/via/vt82c686a/vt82c686a_early_smbus.c
>
> --- src/southbridge/via/vt82c686a/vt82c686a_early_smbus.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a_early_smbus.c	(revision 0)
> @@ -0,0 +1,317 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2003 Ron Minnich
> Copyright (C) 2003 Eric W. Beiderman
> Copyright (C) 2004 Mark Wilkinson
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +#define SMBUS_IO_BASE 0x5000
>
> +#define SMBHSTSTAT 0x0
> +#define SMBSLVSTAT 0x1
> +#define SMBHSTCTL  0x2
> +#define SMBHSTCMD  0x3
> +#define SMBXMITADD 0x4
> +#define SMBHSTDAT0 0x5
> +#define SMBHSTDAT1 0x6
> +#define SMBBLKDAT  0x7
> +#define SMBSLVCTL  0x8
> +#define SMBTRNSADD 0x9
> +#define SMBSLVDATA 0xa
> +#define SMLINK_PIN_CTL 0xe
> +#define SMBUS_PIN_CTL  0xf
>
> +/* Define register settings */
> +#define HOST_RESET 0xff
> +#define DIMM_BASE 0xa0		// 1010000 is base for DIMM in SMBus
> +#define READ_CMD  0x01		// 1 in the 0 bit of SMBHSTADD states to READ
>
> +#define SMBUS_TIMEOUT (100*1000*10)
>
> +static void enable_smbus(void)
> +{
> device_t dev;
> unsigned char c;
> /* Power management controller */
> dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4), 0);
> if (dev == PCI_DEV_INVALID) {
> die("SMBUS controller not found\r\n");
> }
> // set IO base address to SMBUS_IO_BASE
> pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1);
> // Enable SMBus
> c = pci_read_config8(dev, 0xd2);
> c |= 5;
> pci_write_config8(dev, 0xd2, c);
> /* make it work for I/O ...
> */
> dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4), 0);
> c = pci_read_config8(dev, 4);
> c |= 1;
> pci_write_config8(dev, 4, c);
> print_debug_hex8(c);
> print_debug(" is the comm register\r\n");
> print_debug("SMBus controller enabled\r\n");
>
> +}
>
> +static inline void smbus_delay(void)
> +{
> outb(0x80, 0x80);
>
> +}
>
> +static int smbus_wait_until_active(void)
> +{
> unsigned long loops;
> loops = SMBUS_TIMEOUT;
> do {
> unsigned char val;
> smbus_delay();
> val = inb(SMBUS_IO_BASE + SMBHSTSTAT);
> if ((val & 1)) {
> 	break;
> }
> } while (--loops);
> return loops ? 0 : -4;
>
> +}
>
> +static int smbus_wait_until_ready(void)
> +{
> unsigned long loops;
> loops = SMBUS_TIMEOUT;
> do {
> unsigned char val;
> smbus_delay();
> val = inb(SMBUS_IO_BASE + SMBHSTSTAT);
> if ((val & 1) == 0) {
> 	break;
> }
> if (loops == (SMBUS_TIMEOUT / 2)) {
> 	outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
> }
> } while (--loops);
> return loops ? 0 : -2;
>
> +}
>
> +static int smbus_wait_until_done(void)
> +{
> unsigned long loops;
> loops = SMBUS_TIMEOUT;
> do {
> unsigned char val;
> smbus_delay();
> val = inb(SMBUS_IO_BASE + SMBHSTSTAT);
> if ((val & 1) == 0) {
> 	break;
> }
> } while (--loops);
> return loops ? 0 : -3;
>
> +}
>
> +void smbus_reset(void)
> +{
> outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
> outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
> outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
> outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
> smbus_wait_until_ready();
> print_debug("After reset status ");
> print_debug_hex8(inb(SMBUS_IO_BASE + SMBHSTSTAT));
> print_debug("\r\n");
>
> +}
>
> +static void smbus_print_error(unsigned char host_status_register)
> +{
> print_err("smbus_error: ");
> print_err_hex8(host_status_register);
> print_err("\r\n");
> if (host_status_register & (1 << 4)) {
> print_err("Interrup/SMI# was Failed Bus Transaction\r\n");
> }
> if (host_status_register & (1 << 3)) {
> print_err("Bus Error\r\n");
> }
> if (host_status_register & (1 << 2)) {
> print_err("Device Error\r\n");
> }
> if (host_status_register & (1 << 1)) {
> print_err("Interrupt/SMI# was Successful Completion\r\n");
> }
> if (host_status_register & (1 << 0)) {
> print_err("Host Busy\r\n");
> }
>
> +}
>
> +/*
> Copied from intel/i82801dbm early smbus code - suggested by rgm.
> Modifications/check against i2c-viapro driver code from linux-2.4.22
> and VT8231 Reference Docs - mw.
> */
>
> +static int smbus_read_byte(unsigned device, unsigned address)
> +{
> unsigned char global_control_register;
> unsigned char global_status_register;
> unsigned char byte;
> if (smbus_wait_until_ready() < 0) {
> outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
> if (smbus_wait_until_ready() < 0) {
> 	return -2;
> }
> }
> /* setup transaction */
> /* disable interrupts */
> outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xfe, SMBUS_IO_BASE + SMBHSTCTL);
> /* set the device I'm talking too */
> outb(((device & 0x7f) << 1) | 1, SMBUS_IO_BASE + SMBXMITADD);
> /* set the command/address... */
> outb(address & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
> /* set up for a byte data read */
> outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x2 << 2), SMBUS_IO_BASE + SMBHSTCTL);
> /* clear any lingering errors, so the transaction will run */
> outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
> /* clear the data byte... */
> outb(0, SMBUS_IO_BASE + SMBHSTDAT0);
> /* start a byte read, with interrupts disabled */
> outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40), SMBUS_IO_BASE + SMBHSTCTL);
> /* poll for it to start */
> if (smbus_wait_until_active() < 0) {
> return -4;
> }
> /* poll for transaction completion */
> if (smbus_wait_until_done() < 0) {
> return -3;
> }
> /* Ignore the Host Busy & Command Complete ? */
> global_status_register = inb(SMBUS_IO_BASE + SMBHSTSTAT) & ~((1 << 1) | (1 << 0));
> /* read results of transaction */
> byte = inb(SMBUS_IO_BASE + SMBHSTDAT0);
> if (global_status_register != 0) {
> return -1;
> }
> return byte;
>
> +}
>
> +#if 0
> +/* SMBus routines borrowed from VIA's Trident Driver */
> +/* this works, so I am not going to touch it for now -- rgm */
> +static unsigned char smbus_read_byte(unsigned char devAdr, unsigned char bIndex)
> +{
> unsigned int i;
> unsigned char bData;
> unsigned char sts = 0;
> /* clear host status */
> outb(0xff, SMBUS_IO_BASE);
> /* check SMBUS ready */
> for (i = 0; i < SMBUS_TIMEOUT; i++)
> if ((inb(SMBUS_IO_BASE) & 0x01) == 0)
> 	break;
> /* set host command */
> outb(bIndex, SMBUS_IO_BASE + 3);
> /* set slave address */
> outb(devAdr | 0x01, SMBUS_IO_BASE + 4);
> /* start */
> outb(0x48, SMBUS_IO_BASE + 2);
> /* SMBUS Wait Ready */
> for (i = 0; i < SMBUS_TIMEOUT; i++)
> if (((sts = inb(SMBUS_IO_BASE)) & 0x01) == 0)
> 	break;
> if ((sts & ~3) != 0) {
> smbus_print_error(sts);
> return 0;
> }
> bData = inb(SMBUS_IO_BASE + 5);
> return bData;
>
> +}
> +#endif
> +/* for reference, here is the fancier version which we will use at some
> point
> */
>
> +# if 0
> +int smbus_read_byte(unsigned device, unsigned address, unsigned char *result)
> +{
> unsigned char host_status_register;
> unsigned char byte;
> reset();
> smbus_wait_until_ready();
> /* setup transaction */
> /* disable interrupts */
> outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
> /* set the device I'm talking too */
> outb(((device & 0x7f) << 1) | 1, SMBUS_IO_BASE + SMBXMITADD);
> /* set the command/address... */
> outb(address & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
> /* set up for a byte data read */
> outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x2 << 2), SMBUS_IO_BASE + SMBHSTCTL);
> /* clear any lingering errors, so the transaction will run */
> outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
> /* clear the data byte... */
> outb(0, SMBUS_IO_BASE + SMBHSTDAT0);
> /* start the command */
> outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40), SMBUS_IO_BASE + SMBHSTCTL);
> /* poll for transaction completion */
> smbus_wait_until_done();
> host_status_register = inb(SMBUS_IO_BASE + SMBHSTSTAT);
> /* Ignore the In Use Status... */
> host_status_register &= ~(1 << 6);
> /* read results of transaction */
> byte = inb(SMBUS_IO_BASE + SMBHSTDAT0);
> smbus_print_error(byte);
> *result = byte;
> return host_status_register != 0x02;
>
> +}
>
> +#endif
> Index: src/southbridge/via/vt82c686a/Config.lb
> ===================================================================
> --- src/southbridge/via/vt82c686a/Config.lb	(revision 0)
> +++ src/southbridge/via/vt82c686a/Config.lb	(revision 0)
> @@ -0,0 +1,8 @@
> +config chip.h
> +driver vt82c686a.o
> +driver vt82c686a_lpc.o
> +driver vt82c686a_acpi.o
> +driver vt82c686a_ide.o
> +#driver vt82c686a_nic.o
> +#driver vt82c686a_usb.o
> Index: src/southbridge/via/vt82c686a/vt82c686a_nic.c
>
> --- src/southbridge/via/vt82c686a/vt82c686a_nic.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a_nic.c	(revision 0)
> @@ -0,0 +1,62 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +#include <console/console.h>
> +#include <device/device.h>
> +#include <device/pci.h>
> +#include <device/pci_ops.h>
> +#include <device/pci_ids.h>
>
> +/*
> Enable the ethernet device and turn off stepping (because it is integrated
> inside the southbridge)
> Since my vt82c686 doesn't have ethernet, this will fail. but it will be fun
> to watch */
>
> +static void nic_init(struct device *dev)
> +{
> uint8_t		byte;
> printk_debug("Configuring VIA LAN\n");
> /* We don't need stepping - though the device supports it */
> byte = pci_read_config8(dev, PCI_COMMAND);
> byte &= ~PCI_COMMAND_WAIT;
> pci_write_config8(dev, PCI_COMMAND, byte);
>
> +}
>
> +static struct device_operations nic_ops = {
> .read_resources   = pci_dev_read_resources,
> .set_resources    = pci_dev_set_resources,
> .enable_resources = pci_dev_enable_resources,
> .init		  = nic_init,
> .enable           = 0,
> .ops_pci          = 0,
>
> +};
>
> +/* If anyone ever has a vt82c686a with integrated nic, they'll need to modify
> this deviceid to make it work */
>
> +static struct pci_driver northbridge_driver __pci_driver = {
> .ops	= &nic_ops,
> .vendor = PCI_VENDOR_ID_VIA,
> .device = PCI_DEVICE_ID_VIA_8233_7,
>
> +};
> Index: src/southbridge/via/vt82c686a/vt82c686a_usb.c
> ===================================================================
> --- src/southbridge/via/vt82c686a/vt82c686a_usb.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a_usb.c	(revision 0)
> @@ -0,0 +1,72 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +static void usb_on(int enable)
> +{
> unsigned char regval;
> /* Base 82c686 controller */
> device_t dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, 0);
> /* USB controller 1 */
> device_t dev2 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, 0);
> /* USB controller 2 */
> device_t dev3 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, dev2);
> /* enable USB1 */
> if(dev2) {
> if (enable) {
> 	pci_write_config8(dev2, 0x3c, 0x05);
> 	pci_write_config8(dev2, 0x04, 0x07);
> } else {
> 	pci_write_config8(dev2, 0x3c, 0x00);
> 	pci_write_config8(dev2, 0x04, 0x00);
> }
> }
> if(dev0) {
> regval = pci_read_config8(dev0, 0x50);
> if (enable) 
> 	regval &= ~(0x10);    
> else
> 	regval |= 0x10;    	      
> pci_write_config8(dev0, 0x50, regval);
> }
> /* enable USB2 */
> if(dev3) {
> if (enable) {
> 	pci_write_config8(dev3, 0x3c, 0x05);
> 	pci_write_config8(dev3, 0x04, 0x07);
> } else {
> 	pci_write_config8(dev3, 0x3c, 0x00);
> 	pci_write_config8(dev3, 0x04, 0x00);
> }
> }
> if(dev0) {
> regval = pci_read_config8(dev0, 0x50);
> if (enable) 
> 	regval &= ~(0x20);    
> else
> 	regval |= 0x20;    
> pci_write_config8(dev0, 0x50, regval);
> }
>
> +}
> Index: src/southbridge/via/vt82c686a/vt82c686a_early_serial.c
> ===================================================================
> --- src/southbridge/via/vt82c686a/vt82c686a_early_serial.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a_early_serial.c	(revision 0)
> @@ -0,0 +1,97 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2003 Ron Minnich
> Copyright (C) 2003 Eric W. Beiderman
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +/*
> Enable the serial evices on the VIA
> */
>
> +/* The base address is 0x15c, 0x2e, depending on config bytes */
> +#include <device/pci_ids.h>
> +#define SIO_BASE 0x3f0
> +#define SIO_DATA  SIO_BASE+1
>
> +static void vt82c686a_writesuper(uint8_t reg, uint8_t val) 
> +{
> outb(reg, SIO_BASE);
> outb(val, SIO_DATA);
>
> +}
>
> +static void vt82c686a_writesiobyte(uint16_t reg, uint8_t val) 
> +{
> outb(val, reg);
>
> +}
>
> +static void vt82c686a_writesioword(uint16_t reg, uint16_t val) 
> +{
> outw(val, reg);
>
> +}
>
> +/* regs we use: 85, and the southbridge devfn is defined by the
> mainboard
> */
>
> +static void enable_vt82c686a_serial(void) 
> +{
> unsigned long x;
> uint8_t c;
> device_t dev;
> outb(6, 0x80);
> dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,PCI_DEVICE_ID_VIA_82C686), 0);
> if (dev == PCI_DEV_INVALID) {
> outb(7, 0x80);
> die("Serial controller not found\r\n"); //umm, pointless???
> }
> /* first, you have to enable the superio and superio config.
>   put a 6 reg 80
> */
> c = pci_read_config8(dev, 0x50);
> c |= 6;
> pci_write_config8(dev, 0x50, c);
> outb(2, 0x80);
> // now go ahead and set up com1.
> // set address
> vt82c686a_writesuper(0xf4, 0xfe);
> // enable serial out
> vt82c686a_writesuper(0xf2, 7);
> // That's it for the sio stuff.
> //	movl	$SUPERIOCONFIG, %eax
> //	movb	$9, %dl
> //	PCI_WRITE_CONFIG_BYTE
> // set up reg to set baud rate.
> vt82c686a_writesiobyte(0x3fb, 0x80);
> // Set 115 kb
> vt82c686a_writesioword(0x3f8, 1);
> // Set 9.6 kb
> //	WRITESIOWORD(0x3f8, 12)
> // now set no parity, one stop, 8 bits
> vt82c686a_writesiobyte(0x3fb, 3);
> // now turn on RTS, DRT
> vt82c686a_writesiobyte(0x3fc, 3);
> // Enable interrupts
> vt82c686a_writesiobyte(0x3f9, 0xf);
> // should be done. Dump a char for fun.
> vt82c686a_writesiobyte(0x3f8, 48);
>
> +}
> Index: src/southbridge/via/vt82c686a/vt82c686a_acpi.c
> ===================================================================
> --- src/southbridge/via/vt82c686a/vt82c686a_acpi.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a_acpi.c	(revision 0)
> @@ -0,0 +1,64 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +#include <console/console.h>
> +#include <device/device.h>
> +#include <device/pci.h>
> +#include <device/pci_ops.h>
> +#include <device/pci_ids.h>
>
> +static void acpi_init(struct device *dev)
> +{
> printk_debug("Configuring VIA ACPI\n");
> // Set ACPI base address to IO 0x4000
> pci_write_config32(dev, 0x48, 0x4001);
> // Enable ACPI access (and setup like award)
> pci_write_config8(dev, 0x41, 0x84);
> // Set hardware monitor base address to IO 0x6000
> pci_write_config32(dev, 0x70, 0x6001);
> // Enable hardware monitor (and setup like award)
> pci_write_config8(dev, 0x74, 0x01);
> // set IO base address to 0x5000
> pci_write_config32(dev, 0x90, 0x5001);
> // Enable SMBus
> pci_write_config8(dev, 0xd2, 0x01);
>
> +}
>
> +static struct device_operations acpi_ops = {
> .read_resources   = pci_dev_read_resources,
> .set_resources    = pci_dev_set_resources,
> .enable_resources = pci_dev_enable_resources,
> .init		  = acpi_init,
> .enable           = 0,
> .ops_pci          = 0,
>
> +};
>
> +static struct pci_driver northbridge_driver __pci_driver = {
> .ops	= &acpi_ops,
> .vendor = PCI_VENDOR_ID_VIA,
> .device = PCI_DEVICE_ID_VIA_82C686_4, /* For 686b, this is different (3057)*/
>
> +};
> Index: src/southbridge/via/vt82c686a/chip.h
> ===================================================================
> --- src/southbridge/via/vt82c686a/chip.h	(revision 0)
> +++ src/southbridge/via/vt82c686a/chip.h	(revision 0)
> @@ -0,0 +1,41 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2003 Ron Minnich
> Copyright (C) 2003 Eric W. Beiderman
> Copyright (C) 2004 Mark Wilkinson
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2005 Stefan Reinauer
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +#ifndef _SOUTHBRIDGE_VIA_VT82C686A
> +#define _SOUTHBRIDGE_VIA_VT82C686A
>
> +extern struct chip_operations southbridge_via_vt82c686a_ops;
>
> +struct southbridge_via_vt82c686a_config {
> /* enables of Non-PCI devices */
> int enable_native_ide;
> int enable_com_ports;
> int enable_keyboard;
> /* currently not parsed but needed by densitron dpx114 */
> int enable_usb;
> int enable_nvram;
>
> +};
>
> +#endif /* _SOUTHBRIDGE_VIA_VT82C686A */
> Index: src/southbridge/via/vt82c686a/vt82c686a_lpc.c
> ===================================================================
> --- src/southbridge/via/vt82c686a/vt82c686a_lpc.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a_lpc.c	(revision 0)
> @@ -0,0 +1,174 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +#include <console/console.h>
> +#include <device/device.h>
> +#include <device/pci.h>
> +#include <device/pci_ops.h>
> +#include <device/pci_ids.h>
>
> +#include <pc80/mc146818rtc.h>
>
> +#include "chip.h"
>
> +/* PIRQ init
> */
>
> +void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4]);
> +static const unsigned char southbridgeIrqs[4] = { 11, 5, 10, 12 };
> +static const unsigned char enetIrqs[4] = { 11, 5, 10, 12 };
> +static const unsigned char slotIrqs[4] = { 5, 10, 12, 11 };
>
> +/*
> Our IDSEL mappings are as follows
> PCI slot is AD31          (device 15) (00:14.0)
> Southbridge is AD28       (device 12) (00:11.0)
>
> +*/
> +static void pci_routing_fixup(struct device *dev)
> +{
> printk_info("%s: dev is %p\n", __FUNCTION__, dev);
> if (dev) {
> /* initialize PCI interupts - these assignments depend
>    on the PCB routing of PINTA-D 
>    PINTA = IRQ11
>    PINTB = IRQ5
>    PINTC = IRQ10
>    PINTD = IRQ12
> */
> pci_write_config8(dev, 0x55, 0xb0);
> pci_write_config8(dev, 0x56, 0xa5);
> pci_write_config8(dev, 0x57, 0xc0);
> }
> // Standard southbridge components
> printk_info("setting southbridge\n");
> pci_assign_irqs(0, 0x11, southbridgeIrqs);
> // Ethernet built into southbridge
> printk_info("setting ethernet\n");
> pci_assign_irqs(0, 0x12, enetIrqs);
> // PCI slot
> printk_info("setting pci slot\n");
> pci_assign_irqs(0, 0x14, slotIrqs);
> printk_info("%s: DONE\n", __FUNCTION__);
>
> +}
>
> +static void vt82c686_init(struct device *dev)
> +{
> unsigned char enables;
> struct southbridge_via_vt82c686a_config *conf = dev->chip_info;
> printk_debug("vt82c686a init\n");
> // enable the internal I/O decode
> enables = pci_read_config8(dev, 0x6C);
> enables |= 0x80;
> pci_write_config8(dev, 0x6C, enables);
> // Map 4MB of FLASH into the address space
> pci_write_config8(dev, 0x41, 0x7f);
> // Set bit 6 of 0x40, because Award does it (IO recovery time)
> // IMPORTANT FIX - EISA 0x4d0 decoding must be on so that PCI
> // interrupts can be properly marked as level triggered.
> enables = pci_read_config8(dev, 0x40);
> pci_write_config8(dev, 0x40, enables);
> // Set 0x42 to 0xf0 to match Award bios
> enables = pci_read_config8(dev, 0x42);
> enables |= 0xf0;
> pci_write_config8(dev, 0x42, enables);
> // Set bit 3 of 0x4a, to match award (dummy pci request)
> enables = pci_read_config8(dev, 0x4a);
> enables |= 0x08;
> pci_write_config8(dev, 0x4a, enables);
> // Set bit 3 of 0x4f to match award (use INIT# as cpu reset)
> enables = pci_read_config8(dev, 0x4f);
> enables |= 0x08;
> pci_write_config8(dev, 0x4f, enables);
> // Set 0x58 to 0x03 to match Award
> pci_write_config8(dev, 0x58, 0x03);
> // enable the ethernet/RTC
> if (dev) {
> enables = pci_read_config8(dev, 0x51);
> enables |= 0x18; 
> pci_write_config8(dev, 0x51, enables);
> }
> // enable IDE, since Linux won't do it.
> // First do some more things to devfn (17,0)
> // note: this should already be cleared, according to the book.
> enables = pci_read_config8(dev, 0x50);
> printk_debug("IDE enable in reg. 50 is 0x%x\n", enables);
> enables &= ~8; // need manifest constant here!
> printk_debug("set IDE reg. 50 to 0x%x\n", enables);
> pci_write_config8(dev, 0x50, enables);
> // set default interrupt values (IDE)
> enables = pci_read_config8(dev, 0x4c);
> printk_debug("IRQs in reg. 4c are 0x%x\n", enables & 0xf);
> // clear out whatever was there.
> enables &= ~0xf;
> enables |= 4;
> printk_debug("setting reg. 4c to 0x%x\n", enables);
> pci_write_config8(dev, 0x4c, enables);
> // set up the serial port interrupts.
> // com2 to 3, com1 to 4
> pci_write_config8(dev, 0x46, 0x04);
> pci_write_config8(dev, 0x47, 0x03);
> pci_write_config8(dev, 0x6e, 0x98);
> /* set up isa bus -- i/o recovery time, rom write enable, extend-ale */
> pci_write_config8(dev, 0x40, 0x54);
> //ethernet_fixup();
> // Start the rtc
> rtc_init(0);
>
> +}
>
> +static void southbridge_init(struct device *dev)
> +{
> vt82c686a_init(dev);
> pci_routing_fixup(dev);
>
> +}
>
> +static struct device_operations vt82c686_lpc_ops = {
> .read_resources   = pci_dev_read_resources,
> .set_resources    = pci_dev_set_resources,
> .enable_resources = pci_dev_enable_resources,
> .init		  = &southbridge_init,
> .scan_bus	  = scan_static_bus,
> .enable           = 0,
> .ops_pci          = 0,
>
> +};
>
> +static struct pci_driver lpc_driver __pci_driver = {
> .ops	= &vt82c686a_lpc_ops,
> .vendor = PCI_VENDOR_ID_VIA,
> .device = PCI_DEVICE_ID_VIA_82C686,
>
> +};
> Index: src/southbridge/via/vt82c686a/vt82c686a.c
> ===================================================================
> --- src/southbridge/via/vt82c686a/vt82c686a.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a.c	(revision 0)
> @@ -0,0 +1,97 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2003-2004 Ron Minnich
> Copyright (C) 2003-2004 Eric W. Beiderman
> Copyright (C) 2004 Mark Wilkinson
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2006 Uwe Hermann
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +#include <console/console.h>
> +#include <device/device.h>
> +#include <device/pci.h>
> +#include <device/pci_ops.h>
> +#include <device/pci_ids.h>
>
> +#include <pc80/mc146818rtc.h>
> +#include <pc80/keyboard.h>
>
> +#include "chip.h"
>
> +/* Base 8231 controller */
> +static device_t lpc_dev;
>
> +void hard_reset(void)
> +{
>    printk_err("NO HARD RESET ON VT82C686A! FIX ME!\n");
>
> +}
>
> +static void keyboard_on(void)
> +{
> unsigned char regval;
> if (lpc_dev) {
> regval = pci_read_config8(lpc_dev, 0x51);
> regval |= 0x0f; 
> pci_write_config8(lpc_dev, 0x51, regval);
> }
> init_pc_keyboard(0x60, 0x64, 0);
>
> +}
>
> +static void com_port_on(void)
> +{
> +#if 0
> // enable com1 and com2.
> enables = pci_read_config8(dev, 0x6e);
> /* 0x80 is enable com port b, 0x10 is to make it com2, 0x8
> * is enable com port a as com1 kevinh/Ispiri - Old code
> * thought 0x01 would make it com1, that was wrong enables =
> * 0x80 | 0x10 | 0x8 ; pci_write_config8(dev, 0x6e,
> * enables); // note: this is also a redo of some port of
> * assembly, but we want everything up.
> */
> /* set com1 to 115 kbaud not clear how to do this yet.
> * forget it; done in assembly.
> */
>
> +#endif
> +}
>
> +/* FixME: to be removed ? */
> +static void vt82c686a_enable(struct device *dev)
> +{
> struct southbridge_via_vt82c686a_config *conf = dev->chip_info;
> if (!lpc_dev) {
> /* the first time called, enable devices not on PCI bus
>  * FIXME: is that device struct there yet? */
> lpc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
> 			  PCI_DEVICE_ID_VIA_82C686, 0);
> if (conf->enable_keyboard)
> 	keyboard_on();
> if (conf->enable_com_ports)
> 	com_port_on();
> }
>
> +}
>
> +struct chip_operations southbridge_via_vt82c686a_ops = {
> CHIP_NAME("VIA VT82C686A Southbridge")
> .enable_dev	= vt82c686a_enable,
>
> +};
> Index: src/southbridge/via/vt82c686a/vt82c686a_ide.c
> ===================================================================
> --- src/southbridge/via/vt82c686a/vt82c686a_ide.c	(revision 0)
> +++ src/southbridge/via/vt82c686a/vt82c686a_ide.c	(revision 0)
> @@ -0,0 +1,129 @@
> +/*
> This file is part of the LinuxBIOS project.
> Copyright (C) 2005 Li-Ta Lo
> Copyright (C) 2006 Ron Minnich
> Copyright (C) 2007 Corey Osgood
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
> the Free Software Foundation; either version 2 of the License, or
> (at your option) any later version.
> This program is distributed in the hope that it will be useful,
> but WITHOUT ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> GNU General Public License for more details.
> You should have received a copy of the GNU General Public License
> along with this program; if not, write to the Free Software
> Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> */
>
> +#include <console/console.h>
> +#include <device/device.h>
> +#include <device/pci.h>
> +#include <device/pci_ops.h>
> +#include <device/pci_ids.h>
> +#include "chip.h"
>
> +static void ide_init(struct device *dev)
> +{
> struct southbridge_via_vt82c686a_config *conf = (struct southbridge_via_vt82c686a_config *)dev->chip_info;
> unsigned char enables;
> if (!conf->enable_native_ide) {
> // Run the IDE controller in 'compatiblity mode - i.e. don't use PCI
> // interrupts.  Using PCI ints confuses linux for some reason.
> printk_info("%s: enabling compatibility IDE addresses\n", __FUNCTION__);
> enables = pci_read_config8(dev, 0x42);
> printk_debug("enables in reg 0x42 0x%x\n", enables);
> enables &= ~0xc0;		// compatability mode
> pci_write_config8(dev, 0x42, enables);
> enables = pci_read_config8(dev, 0x42);
> printk_debug("enables in reg 0x42 read back as 0x%x\n", enables);
> }
> enables = pci_read_config8(dev, 0x40);
> printk_debug("enables in reg 0x40 0x%x\n", enables);
> enables |= 3;
> pci_write_config8(dev, 0x40, enables);
> enables = pci_read_config8(dev, 0x40);
> printk_debug("enables in reg 0x40 read back as 0x%x\n", enables);
> // Enable prefetch buffers
> enables = pci_read_config8(dev, 0x41);
> enables |= 0xf0;
> pci_write_config8(dev, 0x41, enables);
> // Lower thresholds (cause award does it)
> enables = pci_read_config8(dev, 0x43);
> enables &= ~0x0f;
> enables |=  0x05;
> pci_write_config8(dev, 0x43, enables);
> // PIO read prefetch counter (cause award does it)
> pci_write_config8(dev, 0x44, 0x18);
> // Use memory read multiple
> pci_write_config8(dev, 0x45, 0x1c);
> // address decoding.
> // we want "flexible", i.e. 1f0-1f7 etc. or native PCI
> // [e-mail] - the standard linux drivers seem ass slow when
> // used in native mode - I've changed back to classic
> enables = pci_read_config8(dev, 0x9);
> printk_debug("enables in reg 0x9 0x%x\n", enables);
> // by the book, set the low-order nibble to 0xa.
> if (conf->enable_native_ide) {
> enables &= ~0xf;
> // cf/cg silicon needs an 'f' here. 
> enables |= 0xf;
> } else {
> enables &= ~0x5;
> }
> pci_write_config8(dev, 0x9, enables);
> enables = pci_read_config8(dev, 0x9);
> printk_debug("enables in reg 0x9 read back as 0x%x\n", enables);
> // standard bios sets master bit.
> enables = pci_read_config8(dev, 0x4);
> printk_debug("command in reg 0x4 0x%x\n", enables);
> enables |= 7;
> // No need for stepping - [e-mail]
> enables &= ~0x80;
> pci_write_config8(dev, 0x4, enables);
> enables = pci_read_config8(dev, 0x4);
> printk_debug("command in reg 0x4 reads back as 0x%x\n", enables);
> if (!conf->enable_native_ide) {
> // Use compatability mode - per award bios
> pci_write_config32(dev, 0x10, 0x0);
> pci_write_config32(dev, 0x14, 0x0);
> pci_write_config32(dev, 0x18, 0x0);
> pci_write_config32(dev, 0x1c, 0x0);
> // Force interrupts to use compat mode - just like Award bios
> pci_write_config8(dev, 0x3d, 00);
> pci_write_config8(dev, 0x3c, 0xff);
> }
>
> +}
>
> +static struct device_operations ide_ops = {
> .read_resources   = pci_dev_read_resources,
> .set_resources    = pci_dev_set_resources,
> .enable_resources = pci_dev_enable_resources,
> .init		  = ide_init,
> .enable           = 0,
> .ops_pci          = 0,
>
> +};
>
> +static struct pci_driver northbridge_driver __pci_driver = {
> .ops	= &ide_ops,
> .vendor = PCI_VENDOR_ID_VIA,
> .device = PCI_DEVICE_ID_VIA_82C586_1,
>
> +};