Hello Daniel,
You need to properly build Coreboot, integrating BYT-I (as I recall minnow board) FSP, and the info about BYT-I FSP you can find here: https://github.com/IntelFsp/FSP
Zoran _______
On Wed, Mar 21, 2018 at 12:47 PM, Daniel Wagner wagi@monom.org wrote:
Hi,
I would like to test my -rt kernels releases on the minnowboard. Though cyclictest always reports 2 to 4 ms spikes. It looks like that the original firmware is stealing those cycles. So my plan was to try out coreboot and see if my theory is correct or not.
Now, I am struggling with getting anything working. All my attempts to bake a working binary have been completely fruitless. Not a single char on the serial port. If I would at least get something on the serial port I could find my way through the maze.
I am confident that flashing the device is works correctly via my raspberry pi [2]. When I flash the original firmware, the device comes back to live again.
Unfortunately, the documentation on how to configure and build coreboot a bit outdated [1]. My google-foo didn't help either.
Could someone share his/her current config and also post the SHAs of coreboot? This would rule out that part. I am not sure if my binary blobs I extracted or downloaded are okay (fd, me, gbe, FSB).
Thanks, Daniel
[1] https://elinux.org/Minnowboard:MinnowMaxCoreboot [2] https://3mdeb.com/firmware/flashing-minnowboard-turbot-with-raspberry-pi-zer...
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